AD9680 Datasheet, PDF (75/97 Pages) Analog Devices – Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter

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AD9680
START
NO
RESET
SYSREF± IGNORE
NO
COUNTER
SYSREF±
ENABLED?
(0x120)
YES
INCREMENT
SYSREF± IGNORE
COUNTER
NO
SYSREF±
ASSERTED?
YES
UPDATE
SETUP/HOLD
DETECTOR STATUS
(0x128)
NO
SYSREF±
IGNORE
COUNTER
EXPIRED?
(0x121)
YES
ALIGN CLOCK
DIVIDER
PHASE TO
SYSREF
YES
INPUT
CLOCK
DIVIDER
ALIGNMENT
REQUIRED?
YES
CLOCK
DIVIDER
AUTO ADJUST
ENABLED?
(0x10D)
YES
CLOCK
DIVIDER
> 1?
(0x10B)
NO
NO
NO
INCREMENT
SYSREF±
COUNTER
(0x12A)
SYNCHRONIZATION
MODE?
(0x1FF)
TIMESTAMP
MODE
SYSREF±
TIMESTAMP
DELAY
(0x123)
SYSREF±
CONTROL BITS?
(0x559, 0x55A,
0x58F)
YES
SYSREF±
INSERTED
IN JESD204B
CONTROL BITS
NO
NORMAL
MODE
RAMP
TEST
MODE
ENABLED?
(0x550)
YES
SYSREF± RESETS
RAMP TEST
MODE
GENERATOR
NO
BACK TO START
JESD204B
LMFC
ALIGNMENT
REQUIRED?
YES
ALIGN PHASE
OF ALL
INTERNAL CLOCKS
(INCLUDING LMFC)
TO SYSREF±
SEND INVALID
8-BIT/10-BIT
CHARACTERS
(ALL 0's)
NO
SYNC~
ASSERTED
YES
SEND K28.5
CHARACTERS
NORMAL
JESD204B
INITIALIZATION
NO
SIGNAL
MONITOR
ALIGNMENT
ENABLED?
(0x26F)
NO
YES
ALIGN SIGNAL
MONITOR
COUNTERS
DDC NCO
ALIGNMENT
ENABLED?
(0x300)
YES
ALIGN DDC
NCO PHASE
ACCUMULATOR
NO
Figure 171. Multichip Synchronization
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Rev. C | Page 75 of 97