UG-400 Datasheet, PDF (7/20 Pages) Analog Devices – Plug and play system evaluation

Hardware User Guide
UG-400
ISOLATED RS-232
The isolated RS-232 port is implemented using the ADM3252E
signal and power isolated RS-232 transceiver. The ADM3252E con-
nects to UART3 of the ADSP-BF548 and is capable of functioning
at data rates of up to 460 kbit/sec. Figure 6 shows a circuit diagram
of the implementation of the ADM3252E on the ezLINX hardware.
When the JP2 jumper is fitted, it implements a loopback of the
isolated RS-232 transmitter output (Pin TOUT1) to the receiver
input (Pin RIN1).
The VCC pins (Pin A2, Pin B1, and Pin B2) of the ADM3252E
are powered with 3.3 V and generate an isolated 3.3 V on the
UART3TX
UART3RX
U44
D1
F1 ^TIN1
TIN2
H1
K1 ^ROUT1
ROUT2
TOUT1
TOUT2
RIN1
RIN2
C1+
C1-
C2+
3.3V
C2-
VISO pins (Pin A10, Pin B10, and Pin C10) using Analog Devices
isoPower technology.
A 3-pin screw terminal connector, J6, is used for easy access to the
TOUT1 (Pin 2 of J6), RIN1 (Pin 3 of J6), and RS232_ISO_GND
(Pin 1 of J6) signals.
The ADM3252E contains isoPower technology that uses high
frequency switching elements to transfer power through the
transformer. Special care must be taken during PCB layout to
meet emissions standards. Refer to the AN-0971 Application
Note, Recommendations for Control of Radiated Emissions with
isoPower Devices, for details on board layout considerations.
JP2
++
JUMPER
J6
1
D11
F11
2
H11
K11
C125
0.1uF
C11
E11
C126
0.1uF
G11
G10
3
Screw_3
RS232_ISO_GND
RS232_ISO_3.3V
B1
A2 ^VCC
B2 ^VCC
VCC
A10
VISO _B10
VISO _C10
VISO
B11
V+ _J11
V-
C2
D2 ^GND
E1 ^GND
E2 ^GND
F2 ^GND
G1 ^GND
G2 ^GND
H2 ^GND
J1 ^GND
J2 ^GND
K2 ^GND
L2 ^GND
C1 ^GND
GND
A1
NC1 _L1
NC2
A11
DNC1 _L11
DNC2
D10
GNDISO _E10
GNDISO _F10
GNDISO _H10
GNDISO _J10
GNDISO _K10
GNDISO _L10
GNDISO
ADM3252E
C141
0.1uF
C142
0.1uF
RS232_ISO_GND
GND
RS232_ISO_GND
3.3V
RS232_ISO_3.3V
C130
0.1uF
C236
10uF
C140
0.1uF
C237
10uF
GND
RS232_ISO_GND
Figure 6. ADM3252E Isolated RS-232 Implementation
Rev. 0 | Page 7 of 20