UG-400 Datasheet, PDF (3/20 Pages) Analog Devices – Plug and play system evaluation

Hardware User Guide
SYSTEM ARCHITECTURE
The system architecture block diagram of the ezLINX hardware
is shown in Figure 2. An extender connector, Hirose FX8-120P-
UG-400
SV(91), is added for additional functionality. The Ethernet
option is not fitted on the standard ezLINX hardware.
JTAG
HIROSE FX8-120P-SV(91)
JTAG
PPIO GPIO SPORT3 TW0 CAN1 SPI1
UART0
LEDs
GPIO
FACTORY
RESET
RESET
*ETHERNET
NOT FITTED
ADSP-BF548
25MHz
SPI2
TW1
CAN0
UART2
UART3
UART1
SPI0
ADuM3401
ADuM3402
ADuM1250
ADM3053
ADM2587E ADM3252E
ADM3202
ADuM3401
ADuM3402
ISOLATED
SPI2
ISOLATED
I²C
ISOLATED
CAN
ISOLATED
RS-485
ISOLATED
RS-232
CONSOLE
Figure 2. ezLINX Hardware Block Diagram
ISOLATED
SPI
Rev. 0 | Page 3 of 20