ADSP-2185M Datasheet, PDF (7/40 Pages) Analog Devices – DSP Microcomputer

ADSP-2185M
Memory Interface Pins
The ADSP-2185M processor can be used in one of two modes: Full Memory Mode, which allows BDMA operation with full exter-
nal overlay memory and I/O capability, or Host Mode, which allows IDMA operation with limited external addressing capabilities.
The operating mode is determined by the state of the Mode C pin during RESET and cannot be changed while the processor is running.
The following tables list the active signals at specific pins of the DSP during either of the two operating modes (Full Memory or
Host). A signal in one table shares a pin with a signal from the other table, with the active signal determined by the mode set. For the
shared pins and their alternate signals (e.g., A4/IAD3), refer to the package pinout tables.
Full Memory Mode Pins (Mode C = 0)
Pin Name
# of Pins
I/O
A13:0
14
O
D23:0
24
I/O
Function
Address Output Pins for Program, Data, Byte, and I/O Spaces
Data I/O Pins for Program, Data, Byte, and I/O Spaces (8 MSBs are also
used as Byte Memory Addresses.)
Host Mode Pins (Mode C = 1)
Pin Name
# of Pins
I/O
Function
IAD15:0
16
A0
1
D23:8
16
IWR
1
IRD
1
IAL
1
IS
1
IACK
1
I/O
IDMA Port Address/Data Bus
O
Address Pin for External I/O, Program, Data, or Byte Access¹
I/O
Data I/O Pins for Program, Data, Byte, and I/O Spaces
I
IDMA Write Enable
I
IDMA Read Enable
I
IDMA Address Latch Pin
I
IDMA Select
O
IDMA Port Acknowledge Configurable in Mode D; Open Drain
NOTE
1_{In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals.}
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