ADSP-2185M Datasheet, PDF (24/40 Pages) Analog Devices – DSP Microcomputer

ADSP-2185M
Parameter
Min
Max
Unit
Interrupts and Flags
Timing Requirements:
t_IFS
IRQx, FI, or PFx Setup before CLKOUT Low^{1, 2, 3, 4}
0.25t_CK + 10
ns
t_IFH
IRQx, FI, or PFx Hold after CLKOUT High^{1, 2, 3, 4}
0.25t_CK
ns
Switching Characteristics:
t_FOH
Flag Output Hold after CLKOUT Low⁵
t_FOD
Flag Output Delay from CLKOUT Low⁵
0.5t_CK – 5
ns
0.5t_CK + 4
ns
NOTES
1_{If IRQx and FI inputs meet tIFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on}
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-2100 Family User’s Manual for further information on
interrupt servicing.)
2_{Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.}
3_{IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQLE.}
4_{PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.}
5_{Flag Outputs = PFx, FL0, FL1, FL2, FO.}
CLKOUT
FLAG
OUTPUTS
IRQx
FI
PFx
t_FOD
t_FOH
t_IFH
t_IFS
Figure 22. Interrupts and Flags
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