AD9154 Datasheet, PDF (62/124 Pages) Analog Devices – Quad, 16-Bit, 2.4 GSPS, TxDAC+ Digital-to-Analog Converter

AD9154
Data Sheet
DIGITAL DATAPATH
INPUT
POWER
DETECTION
AND
PROTECTION
COARSE
AND
FINE
MODULATION
INV
SINC
DIGITAL GAIN
AND PHASE
AND OFFSET
ADJUSTMENT
Figure 68. Block Diagram of the Digital Datapath
Figure 68 shows a block diagram of the signal processing digital
datapath. The digital processing includes an input power
detection block, three half-band interpolation filters, a quadrature
modulator consisting of a fine resolution NCO modulator and
fDAC/4 and fDAC/8 coarse modulator blocks, an inverse sinc filter,
and gain, phase, offset, and group delay adjustment blocks.
The datapath is organized into two identical paths. Each path
processes a pair of digital signals input from the JESD204B
transport layer block. The digital signals are processed by a
datapath and input to a pair of DAC cores. Interpolation modes
process the pair of signals as independent data streams. The
coarse and fine modulation block requires that a data stream to
be upconverted be an I/Q pair of signals
DUAL PAGING
The digital datapath registers are paged to allow configuration
of either DAC dual independently or both simultaneously. Table 62
shows how to use the dual paging register.
Table 62. Paging Modes
PAGEINDX
Duals
Reg. 0x008[1:0] Paged
1
A
2
B
3 (default)
A and B
DACs Updated
DAC0 and DAC1
DAC2 and DAC3
DAC0, DAC1, DAC2, and DAC3
INTERPOLATION MODES
Interpolation increases the sampling rate of a digital signal and
can be bypassed. The transmit path contains three half-band
interpolation filters, which each provide a 2× increase in the
output sampling rate and a low-pass function. Table 63 shows
how to select each available interpolation mode, their usable
bandwidths, and their maximum data rates. Note that
fDATA = fDAC/InterpolationFactor
The maximum values of fDATA for interpolator bypass and the
three interpolation factors are listed in Table 2 as adjusted DAC
update rates; fDATA is another name for the adjusted DAC update
rate. Interpolation mode is paged as described in the Dual
Paging section. Register 0x030, Bit 0 is high if an unsupported
interpolation mode is selected.
Table 63. Interpolation Modes and Usable Bandwidth
INTERPMODE
Interpolation Mode Reg. 0x112[2:0] Usable Bandwidth
1× (bypass)
0x00
0.5 x fDATA
2×
0x01
0.4 × fDATA
4×
0x03
0.4 × fDATA
8×
0x04
0.4 × fDATA
1 _{The maximum speed for 1× interpolation is limited by the JESD204B interface.}
Filter Performance
Several functions are paged by DAC dual, such as input data
format, downstream protection, interpolation, modulation,
inverse sinc, digital gain, phase offset, dc offset, group delay, IQ
swap, datapath PRBS, LMFC sync, and NCO alignment.
Interpolation modes increase the sampling rate of a digital
signal by a factor of 2, 4, or 8. As part of the process, a digital
low-pass filter is applied. The filter magnitude response for each
interpolation mode is shown in Figure 69.
DATA FORMAT
BINARY_FORMAT (Register 0x110, Bit 7), paged as described
in the Dual Paging section) controls the expected input data
format. By default it is 0, which means the input data must be in
twos complement. It can also be set to 1, which means input
data is in offset binary (0x0000 is negative full scale and 0xFFFF
is positive full scale).
The usable bandwidth (as shown in Table 63) is defined as the
frequency band over which the filters have a pass-band ripple of
less than ±0.001 dB and an image rejection of greater than 85 dB.
0
2×
4×
8×
–20
–40
–60
–80
–100
0
0.2
0.4
0.6
0.8
1.0
FREQUENCY (×f_DAC)
Figure 69. All Band Responses of Interpolation Filters
Rev. B | Page 62 of 124