HMC546LP2E Datasheet, PDF (6/13 Pages) Analog Devices – 10 W, Failsafe, GaAs, SPDT Switch 0.2 GHz to 2.7 GHz

HMC546LP2E
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Tx 1
V_CTL 2
ACG 3
HMC546LP2E
TOP VIEW
(Not to Scale)
6 RFC
5 V_DD
4 Rx
NOTES
1. EXPOSED PAD. THE PACKAGE BOTTOM
HAS AN EXPOSED METAL PADDLE THAT
MUST BE CONNECTED TO THE PRINTED
CIRCUIT BOARD (PCB) RF GROUND.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic
Description
1
Tx
Radio Frequency (RF) Transmit. This pin is dc- coupled and not well matched to 50 Ω. External matching
components and a dc blocking capacitor are required.
2
VCTL
Control Voltage Input. For more information about the VCTL pin, see Table 4 and Figure 3.
3
ACG
AC Ground. An external capacitor from ACG to ground is required.
4
Rx
RF Receive. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
5
VDD
Supply Voltage. See Figure 4 for the interface schematic.
6
RFC
RF Common. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
EPAD
Exposed Pad. The package bottom has an exposed metal paddle that must be connected to the printed
circuit board (PCB) RF ground.
Table 4. Truth Table
VCTL
0V
VDD
0V
High-Z
Control Input¹
VDD
VDD
VDD
0V
High-Z
RFC to Tx
Off
On
On
On
Signal Path State
RFC to Rx
On
Off
Off
Off
1 _{VDD = 3 V to 8 V, and control input voltage tolerances are ±0.2 V dc.}
INTERFACE SCHEMATICS
V_CTL
V_DD
Figure 3. VCTL Interface
Figure 4. VDD Interface
Rev. E | Page 6 of 13