AD9979_15 Datasheet, PDF (50/56 Pages) Analog Devices – 14-Bit, CCD Signal Processor with Precision Timing Core

AD9979
Table 32. Update Control Registers
Data Bit Default Update
Address Content Value Type
60
[15:0] 1803 SCK
[27:16]
61
[15:0] E7FC SCK
[27:16]
62
[15:0] F8FD SCK
[27:16]
63
[15:0] 0702 SCK
[27:16]
64
[15:0] FFF9 SCK
[27:16]
65
[15:0] 0006 SCK
[27:16]
66
[15:0] FFFF SCK
[27:16]
Name
AFE_UPDT_SCK
Unused
AFE_UPDT_VD
Unused
MISC_UPDT_SCK
Unused
MISC_UPDT_VD
Unused
VDHD_UPDT_SCK
Unused
VDHD_UPDT_VD
Unused
TGCORE_UPDT_SCK
Unused
Description
Enable SCK update of AFE registers. Each bit corresponds to
one address location.
AFE_UPDT_SCK[0] = 1; update Address 0x00 on SCK rising edge.
AFE_UPDT_SCK[1] = 1; update Address 0x01 on SCK rising edge.
…
AFE_UPDT_SCK[15] = 1; update Address 0x0F on SCK rising edge.
Set unused bits to 0, if accessed.
Enable VD update of AFE registers. Each bit corresponds to
one address location.
AFE_UPDT_VD[0] = 1; update Address 0x00 on VD rising edge.
AFE_UPDT_VD[1] = 1; update Address 0x01 on VD rising edge.
…
AFE_UPDT_VD[15] = 1; update Address 0x0F on VD rising edge.
Set unused bits to 0, if accessed.
Enable SCK update of miscellaneous registers. Each bit corresponds to
one address location.
MISC_UPDT_SCK[0] = 1; update Address 0x10 on SCK rising edge.
MISC_UPDT_SCK[1] = 1; update Address 0x11 on SCK rising edge.
…
MISC_UPDT_SCK[15] = 1; update Address 0x1F on SCK rising edge.
Set unused bits to 0, if accessed.
Enable VD update of miscellaneous registers. Each bit corresponds to
one address location.
MISC_UPDT_VD[0] = 1; update Address 0x10 on VD rising edge.
MISC_UPDT_VD[1] = 1; update Address 0x11 on VD rising edge.
…
MISC_UPDT_VD[15] = 1; update Address 0x1F on VD rising edge.
Set unused bits to 0, if accessed.
Enable SCK update of VDHD registers. Each bit corresponds to
one address location.
VDHD_UPDT_SCK[0] = 1; update Address 0x20 on SCK rising edge.
VDHD_UPDT_SCK[1] = 1; update Address 0x21 on SCK rising edge.
…
VDHD_UPDT_SCK[15] = 1; update Address 0x22 on SCK rising edge.
Set unused bits to 0, if accessed.
Enable VD update of VDHD registers. Each bit corresponds to
one address location.
VDHD_UPDT_SCK[0] = 1; update Address 0x20 on VD rising edge.
VDHD_UPDT_SCK[1] = 1; update Address 0x21 on VD rising edge.
…
VDHD_UPDT_SCK[15] = 1; update Address 0x22 on VD rising edge.
Set unused bits to 0, if accessed.
Enable SCK update of timing core registers. Each bit corresponds to
one address location.
TGCORE_UPDT_SCK[0] = 1; update Address 0x30 on SCK rising edge.
TGCORE_UPDT_SCK[1] = 1; update Address 0x31 on SCK rising edge.
…
TGCORE_UPDT_SCK[15] = 1; update Address 0x37 on SCK rising edge.
Set unused bits to 0, if accessed.
Rev. C | Page 50 of 56