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SSM2141 Datasheet, PDF (5/6 Pages) Analog Devices – High Common-Mode Rejection Differential Line Receiver
Voltage Noise Density vs. Frequency
10mV
1mS
+10µV
0V
–10µV
TA = +25°C
VS = ±15V
NOTE: EXTERNAL AMPLIFIER GAIN = 1000;
THEREFORE, VERTICAL SCALE = 10µV/DIV.
Voltage Noise from 0 kHz to 1 kHz
APPLICATIONS INFORMATION
The SSM2141 represents a versatile analog building block. In
order to capitalize on fast settling time, high slew rate, and high
CMR, proper decoupling and grounding techniques must be
employed. For decoupling, place 0.1 µF capacitor located within
close proximity from each supply pin to ground.
SSM2141
5mV
1S
+1µV
0V
–1µV
0.1 TO 10Hz PEAK-TO-PEAK NOISE
Low Frequency Voltage Noise
10mV
2mS
+10µV
0V
–10µV
TA = +25°C
VS = ±15V
NOTE: EXTERNAL AMPLIFIER GAIN = 1000;
THEREFORE, VERTICAL SCALE = 10µV/DIV.
Voltage Noise from 0 kHz to 10 kHz
Slew Rate Test Circuit
REV. B
–5–