ADSP-21160N_15 Datasheet, PDF (47/60 Pages) Analog Devices – SHARC Digital Signal Processor

OUTPUT DRIVE CURRENTS—ADSP-21160M
Figure 29 shows typical I–V characteristics for the output driv-
ers of the ADSP-21160M. The curves represent the current
drive capability of the output drivers as a function of output
voltage.
120
100
80
V_DDEXT = 3.47V, 0°C
60
V_DDEXT = 3.3V, 25°C
V_DDEXT = 3.13V,
40
85°C
20
0
–20
–40
–60 V_DDEXT = 3.47V, 0°C
–80
V_DDEXT = 3.3V, 25°C
–100
–120
0
V_DDEXT = 3.13V,
85°C
0.5
1
1.5
2
2.5
3
3.5
SOURCE (V_DDEXT) VOLTAGE – V
Figure 29. ADSP-21160M Typical Drive Currents
OUTPUT DRIVE CURRENTS—ADSP-21160N
Figure 30 shows typical I–V characteristics for the output driv-
ers of the ADSP-21160N. The curves represent the current drive
capability of the output drivers as a function of output voltage.
80
V_DDEXT = 3.47V, –45°C
60
V_DDEXT = 3.3V, 25°C
40
20 V_DDEXT = 3.11V, 115°C
V_OH
0
V_DDEXT = 3.11V, 115°C
–20
V_{O L}
V_DDEXT = 3.3V, 25°C
–40
–60
–80
0
V_DDEXT = 3.47V, –45°C
0.5
1
1.5
2
2.5
3
3.5
SWEEP (V_DDEXT) VOLTAGE – V
Figure 30. ADSP-21160N Typical Drive Currents
POWER DISSIPATION
Total power dissipation has two components: one due to inter-
nal circuitry and one due to the switching of external output
drivers.
ADSP-21160M/ADSP-21160N
Internal power dissipation is dependent on the instruction
execution sequence and the data operands involved. Using the
current specifications (I_DD-INPEAK, I_DD-INHIGH, I_DD-INLOW, and
I_DD-IDLE) from Electrical Characteristics—ADSP-21160M on
Page 16 and Electrical Characteristics—ADSP-21160N on
Page 18 and the current-versus-operation information in
Table 37, engineers can estimate the ADSP-21160x DSP’s
internal power supply (V_DDINT) input current for a specific
application, according to the formula:
% Peak  I_DD-INPEAK
% High  I_DD-INHIGH
% Low  I_DD-INLOW
+ % Peak  I_DD-IDLE
= I_DDINT
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
• The number of output pins that switch during each
cycle (O)
• The maximum frequency at which they can switch (f)
• Their load capacitance (C)
• Their voltage swing (V_DD)
and is calculated by:
P_EXT = O × C × V_DD2 × f
The load capacitance should include the processor’s package
capacitance (C_IN). The switching frequency includes driving the
load high and then back low. Address and data pins can drive
high and low at a maximum rate of 1/(2t_CK). The write strobe
can switch every cycle at a frequency of 1/t_CK. Select pins switch
at 1/(2t_CK), but selects can switch on each cycle.
Example for ADSP-21160N: Estimate P_EXT with the following
assumptions:
• A system with one bank of external data memory—
asynchronous RAM (64-bit)
• Four 64K × 16 RAM chips are used, each with a load
of 10 pF
• External data memory writes occur every other cycle, a rate
of 1/(2 t_CK), with 50% of the pins switching
• The bus cycle time is 50 MHz (t_CK = 20 ns).
The P_EXT equation is calculated for each class of pins that
can drive, as shown in Table 38.
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
where:
P_TOTAL = P_EXT + P_INT + P_PLL
• P_EXT is from Table 38
• P_INT is I_DDINT × 1.9 V, using the calculation I_DDINT listed in
Power Dissipation on page 47
• P_PLL is AI_DD × 1.9 V, using the value for AI_DD listed in Elec-
trical Characteristics—ADSP-21160M on Page 16 and
Electrical Characteristics—ADSP-21160N on Page 18
Rev. C | Page 47 of 60 | February 2013