AD9518_2_15 Datasheet, PDF (47/64 Pages) Analog Devices – 6-Output Clock Generator with Integrated 2.2 GHz VCO

Data Sheet
AD9518-2
Reg.
Addr.
(Hex)
Parameter
System
0x230 Power-down
and sync
Bit 7 (MSB) Bit 6
Bit 5
Bit 4
Reserved
Bit 3
0x231
Update All Registers
0x232 Update all
registers
Blank
Blank
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
Power
down sync
Power
down
distribution
reference
Reserved
Soft sync
0x00
0x00
Update all
registers
(self-clearing
bit)
0x00
CONTROL REGISTER MAP DESCRIPTIONS
Table 43 through Table 49 provide a detailed description of each of the control register functions. The registers are listed by hexadecimal
address. A range of bits (for example, from Bit 5 through Bit 2) is indicated using a colon and brackets, as follows: [5:2].
Table 43. Serial Port Configuration and Part ID
Reg.
Addr
(Hex) Bits Name
Description
0x000 [7:4] Mirrored, Bits[3:0]
Bits[7:4] should always mirror Bits[3:0] such that it does not matter whether the part is in MSB
or LSB first mode (see Bit 1, Register 0x000). The user should set the bits as follows:
Bit 7 = Bit 0.
Bit 6 = Bit 1.
Bit 5 = Bit 2.
Bit 4 = Bit 3.
3
Long instruction
Short/long instruction mode. This part uses long instruction mode only, so this bit should
always be set to 1b.
0: 8-bit instruction (short).
1: 16-bit instruction (long) (default).
2
Soft reset
Soft reset.
1: soft reset; restores default values to internal registers. Not self-clearing. Must be cleared to
0b to complete reset operation.
1
LSB first
MSB or LSB data orientation.
0: data-oriented MSB first; addressing decrements (default).
1: data-oriented LSB first; addressing increments.
0
SDO active
Selects unidirectional or bidirectional data transfer mode.
0: SDIO pin used for write and read; SDO set to high impedance; bidirectional mode (default).
1: SDO used for read, SDIO used for write; unidirectional mode.
0x003 [7:0] Part ID (read only)
Uniquely identifies the dash version (-0 through -4) of the AD9518.
AD9518-0: 0x21.
AD9518-1: 0x61.
AD9518-2: 0xA1.
AD9518-3: 0x63.
AD9518-4: 0xE3.
0x004 0
Read back active registers Selects register bank used for a readback.
0: reads back buffer registers (default).
1: reads back active registers.
Rev. C | Page 47 of 64