ADSP-TS101SAB1Z100 Datasheet, PDF (45/48 Pages) Analog Devices – TigerSHARC Embedded Processor

ADSP-TS101S
ORDERING GUIDE
Part Number^{1, 2, 3, 4}
Temperature Range Core Clock
(Case)
(CCLK) Rate⁵
ADSP-TS101SAB1-000
–40°C to +85°C
250 MHz
ADSP-TS101SAB1-100
–40°C to +85°C
300 MHz
ADSP-TS101SAB1Z000 –40°C to +85°C
250 MHz
ADSP-TS101SAB1Z100 –40°C to +85°C
300 MHz
ADSP-TS101SAB2-000
–40°C to +85°C
250 MHz
ADSP-TS101SAB2-100
–40°C to +85°C
300 MHz
ADSP-TS101SAB2Z000 –40°C to +85°C
250 MHz
ADSP-TS101SAB2Z100 –40°C to +85°C
300 MHz
1 _{S indicates 1.2 V and 3.3 V supplies.}
2 _{A indicates –40°C to +85°C temperature.}
3 _{000 indicates 250 MHz speed grade; 100 indicates 300 MHz speed grade.}
4 _{Z indicates RoHS compliant part.}
5 _{The instruction rate runs at the internal DSP clock (CCLK) rate.}
6 _{The B-625 package measures 27 mm  27 mm.}
7 _{The B-484 package measures 19 mm  19 mm.}
On-Chip
SRAM
6M Bit
6M Bit
6M Bit
6M Bit
6M Bit
6M Bit
6M Bit
6M Bit
Package Description
625-Ball Plastic Ball Grid Array (PBGA)
625-Ball Plastic Ball Grid Array (PBGA)
625-Ball Plastic Ball Grid Array (PBGA)
625-Ball Plastic Ball Grid Array (PBGA)
484-Ball Plastic Ball Grid Array (PBGA)
484-Ball Plastic Ball Grid Array (PBGA)
484-Ball Plastic Ball Grid Array (PBGA)
484-Ball Plastic Ball Grid Array (PBGA)
Package
Option
B-625⁶
B-625⁶
B-625⁶
B-625⁶
B-484⁷
B-484⁷
B-484⁷
B-484⁷
Rev. C | Page 45 of 48 | May 2009