ADSP-21367_08 Datasheet, PDF (44/56 Pages) Analog Devices – SHARC Processors

ADSP-21367/ADSP-21368/ADSP-21369
SPIDS
(INPUT)
SPICLK
(CP = 0)
(INPUT)
t_{SDSC O}
SPICLK
(CP = 1)
(INPUT)
t_DSOE
t_SPICHS
t_SPICLS
t_DDSPIDS
t_SPICLS
t_SPICHS
t_SPICLKS
t_HDS
t_{D D S P I D S}
MISO
(OUTPUT)
CPHASE = 1
t_SSPIDS
MOSI
(INPUT)
t_DSOV
t_DSOE
MISO
(OUTPUT)
CPHASE = 0
MSB
MSB VALID
MSB
t_DDSPIDS
MOSI
(INPUT)
MSB VALID
t_SSPIDS
LSB
t_{H S P ID S}
LSB VALID
t_{H D S P ID S}
LSB
t_SSPIDS
t_{H S P ID S}
LSB VALID
Figure 35. SPI Slave Timing
t_SDPPW
t_DSDHI
t_{H D S P ID S}
t_DSDHI
Rev. C | Page 44 of 56 | January 2008