AD9577 Datasheet, PDF(43/44 Page) Analog Devices – Clock Generator with Dual PLLs

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AD9577 Datasheet, PDF (43/44 Pages) Analog Devices – Clock Generator with Dual PLLs

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Data Sheet

127â¦

10kâ¦

83â¦

10kâ¦

AD9577

CD 1

VSCA

VSI2C

REFOUT

VSREFOUT

VSX

22pF

REFCLK

XT2

XT1

REFSEL

VSCB

CD 10

AD9577

VSOB1A

OUT1P

OUT1N

VSFA

SSCG

VSM

VSFB

OUT3P

OUT3N

VSOB3B

127â¦

50â¦

VS 83â¦

83â¦

127â¦

50â¦

127â¦

50â¦

83â¦

DO NOT CONNECT OTHER TRACES

TO PIN 15, PIN 16, PIN 35, AND PIN 36.

220nF

127â¦

CAPACITORS CD CONSIST OF

100nF IN PARALLEL WITH 10nF.

83â¦

Figure 50. Typical LVPECL Application Circuit

POWER AND GROUNDING CONSIDERATIONS AND POWER SUPPLY REJECTION

Many applications seek high speed and performance under less

Each power supply pin should have independent decoupling and

than ideal operating conditions. In these application circuits,

connections to the power supply plane. It is recommended that the

the implementation and construction of the PCB is as important

device exposed paddle be directly connected to the ground plane

as the circuit design. Proper RF techniques must be used for

by a grid of at least nine vias. Care should be taken to ensure that

device selection, placement, and routing, as well as for power

the output traces cannot couple onto the reference or crystal input

supply bypassing and grounding to ensure optimum performance.

circuitry.

Rev. 0 | Page 43 of 44

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