ADSP-BF512 Datasheet, PDF (42/62 Pages) Analog Devices – Blackfin Embedded Processor

ADSP-BF512/BF514/BF516/BF518 (F)
General-Purpose Port Timing
Table 33 and Figure 22 describe general-purpose
port operations.
Table 33. General-Purpose Port Timing
Parameter
Timing Requirement
t_WFI
General-Purpose Port Signal Input Pulse Width
Switching Characteristics
t_GPOD
General-Purpose Port Signal Output Delay from CLKOUT Low
Preliminary Technical Data
Min
t_SCLK + 1
0
Max
9.66
Unit
ns
ns
CLKOUT
GPP OUTPUT
GPP INPUT
t_GPOD
t_WFI
Figure 22. General-Purpose Port Timing
Timer Clock Timing
Table 34 and Figure 23 describe timer clock timing.
Table 34. Timer Clock Timing
Parameter
Switching Characteristic
t_TODP
Timer Output Update Delay After PPICLK High
Min
Max
Unit
12.64
ns
PPI CLOCK
TIMER OUTPUT
t_TODP
Figure 23. Timer Clock Timing
Rev. PrE | Page 42 of 62 | March 2009