OP177_06 Datasheet, PDF (4/16 Pages) Analog Devices – Ultraprecision Operational Amplifier

OP177
@ VS = ±15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2.
Parameter
INPUT
Input Offset Voltage
Average Input Offset Voltage Drift¹
Input Offset Current
Average Input Offset Current Drift²
Input Bias Current
Average Input Bias Current Drift²
Input Voltage Range³
COMMON-MODE REJECTION RATIO
POWER SUPPLY REJECTION RATIO
LARGE-SIGNAL VOLTAGE GAIN⁴
OUTPUT VOLTAGE SWING
POWER CONSUMPTION
SUPPLY CURRENT
Symbol Conditions
OP177F
OP177G
Min Typ
Max Min Typ
Max Unit
VOS
TCVOS
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO
VO
PD
ISY
VCM = ±13 V
VS = ±3 V to ±18 V
RL ≥ 2 kΩ, VO = ±10 V
RL ≥ 2 kΩ
VS = ±15 V, no load
VS = ±15 V, no load
−0.2
±13
120
110
2000
±12
15
0.1
0.5
1.5
+2.4
8
±13.5
140
120
6000
±13
60
20
40
20
0.3
0.7
2.2
0.5
40
1.5
+4
+2.4
40
15
±13 ±13.5
110 140
106 115
1000 4000
±12 ±13
75
60
2.5
2
100 μV
1.2 μV/°C
4.5 nA
85 pA/°C
±6 nA
60 pA/°C
V
dB
dB
V/mV
V
75 mW
2.5 mA
1 _{TCVOS is sample tested.}
2 _{Guaranteed by endpoint limits.}
3 _{Guaranteed by CMRR test condition.}
4 _{To ensure high open-loop gain throughout the ±10 V output range, AVO is tested at −10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and −10 V ≤ VO ≤ +10 V.}
TEST CIRCUITS
200kΩ
50Ω
–
OP177
V_O
+
V_OS
=
V_O
4000
Figure 3. Typical Offset Voltage Test Circuit
20kΩ
V+
–
INPUT
+
–
OP177
+
OUTPUT
V_OS TRIM RANGE IS
TYPICALLY ±3.0mV
V–
Figure 4. Optional Offset Nulling Circuit
20kΩ
+20V
–
OP177
+
PINOUTS SHOWN FOR
P AND Z PACKAGES
–20V
Figure 5. Burn-In Circuit
Rev. E | Page 4 of 16