OP177_06 Datasheet, PDF (1/16 Pages) Analog Devices – Ultraprecision Operational Amplifier

Ultraprecision
Operational Amplifier
OP177
FEATURES
Ultralow offset voltage
TA = 25°C, 25 μV maximum
Outstanding offset voltage drift 0.1 μV/°C maximum
Excellent open-loop gain and gain linearity
12 V/μV typical
CMRR: 130 dB minimum
PSRR: 115 dB minimum
Low supply current 2.0 mA maximum
Fits industry-standard precision op amp sockets
GENERAL DESCRIPTION
The OP177 features one of the highest precision performance of
any op amp currently available. Offset voltage of the OP177 is
only 25 μV maximum at room temperature. The ultralow VOS of
the OP177 combines with its exceptional offset voltage drift
(TCVOS) of 0.1 μV/°C maximum to eliminate the need for
external VOS adjustment and increases system accuracy over
temperature.
The OP177 open-loop gain of 12 V/μV is maintained over the
full ±10 V output range. CMRR of 130 dB minimum, PSRR of
120 dB minimum, and maximum supply current of 2 mA are
just a few examples of the excellent performance of this
PIN CONFIGURATION
V_OS TRIM 1
–IN 2
OP177
8 V_OS TRIM
7 V+
+IN 3
6 OUT
V– 4 ^{TOP VIEW} 5 NC
(Not to Scale)
NC = NO CONNECT
Figure 1. 8-Lead PDIP (P-Suffix),
8-Lead SOIC (S-Suffix)
operational amplifier. The combination of outstanding
specifications of the OP177 ensures accurate performance in
high closed-loop gain applications.
This low noise, bipolar input op amp is also a cost effective
alternative to chopper-stabilized amplifiers. The OP177
provides chopper-type performance without the usual problems
of high noise, low frequency chopper spikes, large physical size,
limited common-mode input voltage range, and bulky external
storage capacitors.
The OP177 is offered in the −40°C to +85°C extended industrial
temperature ranges. This product is available in 8-lead PDIP, as
well as the space saving 8-lead SOIC.
V+
NONINVERTING
INPUT
INVERTING
INPUT
V–
2B
Q₅
R₃
Q₂₁
R₄
Q₂₂
FUNCTIONAL BLOCK DIAGRAM
R_2A* ^{(OPTIONAL NULL)} R_2B*
R_1A
R_1B
Q₇
Q₃ Q₆
Q₁
Q₂₃
Q₂₄
Q₈
Q₄
Q₂₇
Q₂₆
Q₂₅
Q₂
C₁
R₇
Q₉
C₃
R₅
Q₁₀
Q₁₁ Q₁₂
C₂
Q₁₄
Q₁₃
Q₁₉
R₉
Q₁₇
Q₁₆
OUTPUT
R₁₀
Q₂₀
Q₁₅
Q₁₈
R₆ R₈
*R_2A AND R_2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY.
Figure 2. Simplified Schematic
Rev. E
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