EVAL-AD7707EB Datasheet, PDF (4/16 Pages) Analog Devices – Evaluation Board for the AD7707 3V/5V, +/-10V Input Range, 1mW, 3Channel, 16-Bit, Sigma Delta ADC

EVAL-AD7707EB
18
1
36
19
Fig. 3: 36-way Centronics (SKT2) Pin Configuration
Table 3: 36-Way Connector Pin Description
1
NC
2
DIN
3
RESET
4
CS
5
SCLK
6-8
NC
9
DV_DD
10
DRDY
11-12
13
NC
DOUT
14-18
19-30
31-36
NC
DGND
NC
No Connect. This pin is not connected on the evaluation board.
Serial Data Input. Data applied to this pin is buffered before being applied to the AD7707 DIN pin.
Serial Data Input with serial data being written to the input shift register on the part. Data from this
input shift register is transferred to the setup register, clock register or communications register
depending on the register selection bits of the Communications Register.
Reset Input. The signal on this pin is buffered before being applied to the RESET pin of the AD7707.
RESET is an active low input which resets the control logic, interface logic, calibration coefficients,
digital filter and analog modulator of the part to power-on status.
Chip Select. The signal on this pin is buffered before being applied to the CS pin of the AD7707.
CS is an active low Logic Input used to select the AD7707. With this input hard-wired low, the
AD7707 can operate in its three-wire interface mode with SCLK, DIN and DOUT used to interface
to the device. CS can be used to select the device in systems with more than one device on the serial
bus or as a frame synchronization signal in communicating with the AD7707.
Serial Clock. The signal on this pin is buffered before being applied to the SCLK pin of the AD7707.
An external serial clock is applied to this input to read/write serial data from/to the AD7707. This
serial clock can be continuous with all data transmitted in a continuous train of pulses. Alternatively,
it can be non-continuous with the information being transmitted to the AD7707 in smaller batches
of data.
No Connect. These pins are not connected on the evaluation board.
Digital Supply Voltage. This provides the supply voltage for the buffer chips, U3-U5, which buffer
the signals between the AD7707 and SKT1/SKT2.
Logic output. This is a buffered version of the signal on the AD7707 DRDY pin. A logic low on
this output indicates that a new output word is available from the AD7707 data register. The DRDY
pin will return high upon completion of a read operation of a full output word. If no data read has
taken place between output updates, the DRDY line will return high for 500 x CLK _IN cycles prior
to the next output update. While DRDY is high, a read operation should not be attempted to avoid
reading from the data register as it is being updated. The DRDY line will return low again when
the update has taken place. DRDY is also used to indicate when the AD770-55 has completed its
on-chip calibration sequence.
No Connect. These pins are not connected on the evaluation board.
Serial Data Output. This is a buffered version of the signal on the AD7707 DOUT pin. Serial Data
Output with serial data obtained from the output shift register on the AD7707. The output shift
register can contain information from the setup register, communications register, clock register or
data register depending on the register selection bits of the Communications Register.
No Connect. These pins are not connected on the evaluation board.
Ground reference point for digital circuitry. Connects to the DGND plane on the evaluation board.
No Connect. These pins are not connected on the evaluation board.
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Rev. 0