EVAL-AD7707EB Datasheet, PDF (3/16 Pages) Analog Devices – Evaluation Board for the AD7707 3V/5V, +/-10V Input Range, 1mW, 3Channel, 16-Bit, Sigma Delta ADC

EVAL-AD7707EB
SET-UP CONDITIONS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. Table 1 shows the position in which all the links are set when the evaluation board is sent out.
Table 1: Initial Link and Switch Positions
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
Position
B+B
A
A
A
IN
IN
IN
A
A
A
Function
Both links in position "B" to select the on-board crystal as the master clock for the AD7707.
This selects the AD780 +2.5V output as the on-board reference.
This connects the REFIN(-) input of the AD7707 to AGND.
The on-board reference provides the reference voltage for the REFIN(+) input of the AD7707.
The AIN1 pin on the AD7707 is tied to the analog input sockets SKT3.
The AIN2 pin on the AD7707 is tied to the analog input sockets SKT4.
The AIN3 pin on the AD7707 is tied to the analog input sockets SKT5.
The LCOM pin on the AD7707 is tied to the AGND.
The HBIAS pin of the AD7707 is tied to the REFIN+ pin.
The HCOM pin on the AD7707 is tied to the AGND.
EVALUATION BOARD INTERFACING
Interfacing to the evaluation board is via either a 9-way d-type connector, SKT1 or a 36-way centronics connector, SKT2.
The pin-out for the SKT1 connector is shown in Fig. 2 and its pin designations are given in Table 2. The pin-out for the
SKT2 connector is shown in Fig. 3 and its pin designations are given in Table 3.
SKT2 is used to connect the evaluation board to the parallel (printer) port of a PC. Connection is via a standard printer cable.
SKT1 is used to connect the evaluation to any other system. The evaluation board should be powered up before a cable is
connected to either of these connectors.
1 2 34 ₅
6 78 9
Fig. 2: Pin Configuration for the 9-Way D-Type Connector, SKT1.
Table 2.:
SKT1 Pin Description ¹
1 SCLK Serial Clock. The signal on this pin is buffered before being applied to the SCLK pin of the AD7707.
2 DRDY Logic output. This is a buffered version of the signal on the AD7707 DRDY pin
3 CS
Chip Select. The signal on this pin is buffered before being applied to the CS pin on the AD7707.
4 RESET Reset Input. Data applied to this pin is buffered before being applied to the AD7707 RESET pin.
5 DIN Serial Data Input. Data applied to this pin is buffered before being applied to the AD7707 DIN pin.
6 D G N D Ground reference point for the digital circuitry. Connects to the DGND plane on the Evaluation board.
7 D O U T Serial Data Output. This is a buffered version of the signal on the AD7707 DOUT pin.
8 DV_DD
9 NC
Digital Supply Voltage. If no voltage is applied to the board's DV_DD input terminal then the voltage applied to
this pin will supply the DV_DD for the digital buffers.
Not Connected.
Note
1 _{An explanation of the AD7707 functions mentioned here is given in Table 3 overleaf as part of the SKT2 pin descriptions.}
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Rev. 0