ADSP-BF523_15 Datasheet, PDF (37/88 Pages) Analog Devices – Blackfin Embedded Processor

ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed in Table 26 may cause perma-
nent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other condi-
tions greater than those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Table 26. Absolute Maximum Ratings
Parameter
Rating
Internal Supply Voltage (V_DDINT) for ADSP-BF523/ADSP-BF525/ADSP-BF527 processors
Internal Supply Voltage (V_DDINT) for ADSP-BF522/ADSP-BF524/ADSP-BF526 processors
External (I/O) Supply Voltage (V_DDEXT/V_DDMEM)
Real-Time Clock Supply Voltage (V_DDRTC)
OTP Supply Voltage (V_DDOTP)
OTP Programming Voltage (V_PPOTP)¹
OTP Programming Voltage (V_PPOTP)²
USB PHY Supply Voltage (V_DDUSB)
Input Voltage^{3, 4, 5}
Input Voltage^{3, 4, 6}
Input Voltage^{3, 4, 7}
–0.3 V to +1.26 V
–0.3 V to +1.47 V
–0.3 V to +3.8 V
–0.5 V to +3.8 V
–0.5 V to +3.0 V
–0.5 V to +3.0 V
–0.5 V to +7.1 V
–0.5 V to +3.8 V
–0.5 V to +3.8 V
–0.5 V to +5.5 V
–0.5 V to +5.25 V
Output Voltage Swing
I_OH/I_OL Current per Pin Group^{3, 8}
Storage Temperature Range
– 0.5 V to V_DDEXT /V_DDMEM + 0.5 V
82 mA (max)
–65°C to +150°C
Junction Temperature While Biased
+110°C
1 _{Applies to OTP memory reads and writes for ADSP-BF523/ADSP-BF525/ADSP-BF527 processors and to OTP memory reads for ADSP-BF522/ADSP-BF524/ADSP-BF526}
processors.
2 _{Applies only to OTP memory writes for ADSP-BF522/ADSP-BF524/ADSP-BF526 processors.}
3 _{Applies to 100% transient duty cycle.}
4 _{Applies only when VDDEXT is within specifications. When VDDEXT is outside specifications, the range is VDDEXT ±0.2 V.}
5 _{For other duty cycles see Table 27.}
6 _{Applies to balls SCL and SDA.}
7 _{Applies to balls USB_DP, USB_DM, and USB_VBUS.}
8 _{For pin group information, see Table 28. For other duty cycles see Table 29.}
Table 27. Maximum Duty Cycle for Input Transient Volt-
age^{1, 2}
Maximum Duty Cycle³ V_IN Min (V)⁴
100%
–0.50
V_IN Max (V)⁶
+3.80
40%
–0.70
+4.00
25%
–0.80
+4.10
15%
–0.90
+4.20
10%
–1.00
+4.30
1 _{Applies to all signal balls with the exception of CLKIN, XTAL, VROUT/}
EXT_WAKE1, SCL, SDA, USB_DP, USB_DM, and USB_VBUS.
2 _{Applies only when VDDEXT is within specifications. When VDDEXT is outside specifi-}
cations, the range is V_DDEXT ±0.2 V.
3 _{Duty cycle refers to the percentage of time the signal exceeds the value for the 100%}
case. The is equivalent to the measured duration of a single instance of overshoot
or undershoot as a percentage of the period of occurrence.
4 _{The individual values cannot be combined for analysis of a single instance of}
overshoot or undershoot. The worst case observed value must fall within one of the
voltages specified, and the total duration of the overshoot or undershoot (exceeding
the 100% case) must be less than or equal to the corresponding duty cycle.
Table 26 specifies the maximum total source/sink (I_OH/I_OL) cur-
rent for a group of pins. Permanent damage can occur if this
value is exceeded. To understand this specification, if pins PH4,
PH3, PH2, PH1, and PH0 from group 1 in Table 28 were sourc-
ing or sinking 2 mA each, the total current for those pins would
be 10 mA. This would allow up to 72 mA total that could be
sourced or sunk by the remaining pins in the group without
damaging the device. For a list of all groups and their pins, see
the Table 28 table. For duty cycles that are less than 100%, see
Table 29. Note that the V_OH and V_OL specifications have separate
per-pin maximum current requirements (see Table 19 on
Page 33 and Table 20 on Page 34).
Table 28. Total Current Pin Groups
Group
1
2
3
4
5
Pins in Group
PH4, PH3, PH2, PH1, PH0, PF15, PF14, PF13
PF12, SDA, SCL, PF11, PF10, PF9, PF8, PF7
PF6, PF5, PF4, PF3, PF2, PF1, PF0, PPI_FS1
PPI_CLK, PG15, PG14, PG13, PG12, PG11, PG10, PG9
PG8, PG7, PG6, PG5, PG4, BMODE3, BMODE2, BMODE1
Rev. D | Page 37 of 88 | July 2013