AD9784_15 Datasheet, PDF (33/52 Pages) Analog Devices – 14-Bit, 200 MSPS/500 MSPS TxDAC

Preliminary Technical Data
AD9784
0
–50
–100
×2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 0
MOD[0] = 1
–150–8
–6
–4
–2
0
2
4
6
8 _fSIN
×4 INTERPOLATION
0
INTERP[1] = 1
–50
INTERP[0] = 0
MOD[1] = 0
–100
MOD[0] = 1
–150–8
–6
–4
–2
0
2
4
6
8 _fSIN
×8 INTERPOLATION
0
INTERP[1] = 1
–50
INTERP[0] = 1
MOD[1] = 0
–100
MOD[0] = 1
–150–8
–6
–4
–2
0
2
4
6
8 _fSIN
Figure 52. Complex Modulation by fDAC/2 under all Interpolation Modes
0
–50
–100
×2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 1
MOD[0] = 0
–150–8
–6
–4
–2
0
2
4
6
8 _fSIN
0
×4 INTERPOLATION
INTERP[1] = 1
–50
INTERP[0] = 0
MOD[1] = 1
–100
MOD[0] = 0
–150
–8
–6
–4
–2
0
2
4
6
8 _fSIN
0
×8 INTERPOLATION
INTERP[1] = 1
–50
INTERP[0] = 1
MOD[1] = 1
–100
MOD[0] = 0
–150
–8
–6
–4
–2
0
2
4
6
8 f_SIN
Figure 53. Complex Modulation by fDAC/4 under all Interpolation Modes
0
–50
–100
×2 INTERPOLATION
INTERP[1] = 0
INTERP[0] = 1
MOD[1] = 1
MOD[0] = 1
–150
–8
–6
–4
–2
0
2
4
6
8 _fSIN
×4 INTERPOLATION
0
INTERP[1] = 1
–50
INTERP[0] = 0
MOD[1] = 1
–100
MOD[0] = 1
–150
–8
–6
–4
–2
0
2
4
6
8 _fSIN
×8 INTERPOLATION
0
INTERP[1] = 1
–50
INTERP[0] = 1
MOD[1] = 1
–100
MOD[0] = 1
–150
–8
–6
–4
–2
0
2
4
6
8 _fSIN
Figure 54. Complex Modulation by fDAC/8 under all Interpolation Modes
Rev. PrC | Page 33 of 52