ADSP-2187LBSTZ-210 Datasheet, PDF (32/48 Pages) Analog Devices – DSP Microcomputer

ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
IDMA Write, Long Write Cycle
Table 22. IDMA Write, Long Write Cycle
Parameter
Min
Max
Timing Requirements:
t_IKW
IACK Low Before Start of Write¹
t_IKSU
IAD15–0 Data Setup Before End of Write^{2, 3, 4}
t_IKH
IAD15–0 Data Hold After End of Write^{2, 3, 4}
Switching Characteristics:
0
0.5t_CK + 10
2
t_IKLW
Start of Write to IACK Low⁴
t_IKHW
Start of Write to IACK High⁵
1.5t_CK
17
1 _{Start of Write = IS Low and IWR Low.}
2 _{If Write Pulse ends before IACK Low, use specifications tIDSU, tIDH.}
3 _{If Write Pulse ends after IACK Low, use specifications tIKSU, tIKH.}
4 _{This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the ADSP-2100 Family User’s Manual.}
5 _{For the ADSP-2185L, and the ADSP-2187L, this specification is 4 ns min., and 15 ns max.}
IACK
IS
t_{IK W}
t_{IKH W}
t_{IK LW}
Unit
ns
ns
ns
ns
ns
IWR
IAD15 –0
t_{I K SU}
DATA
t_{IK H}
Figure 24. IDMA Write, Long Write Cycle
Rev. C | Page 32 of 48 | January 2008