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| ADSP-BF533 Datasheet, PDF (31/60 Pages) Analog Devices – Blackfin Embedded Processor | |||
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PPI_CLK
POLC = 0
PPI_CLK
POLC = 1
POLS = 1
PPI_FS1
POLS = 0
FRAME
SYNC IS
DRIVEN
OUT
tHOFSPE
tDFSPE
DATA0 IS
DRIVEN
OUT
POLS = 1
PPI_FS2
POLS = 0
PPI_DATA
tDDTPE
tHDTPE
DATA0
Figure 17. PPI GP Tx Mode with Internal Frame Sync Timing
ADSP-BF533
Rev. D | Page 31 of 60 | September 2006
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