AD9925 Datasheet, PDF (30/96 Pages) Analog Devices – CCD Signal Processor with Vertical Driver and Precision Timing Generator

AD9925
Generating Line Alternation for Vertical Sequence and
HBLK
During low resolution readout, some CCDs require a different
number of vertical clocks on alternate lines. The AD9925 can
support this by using the VPATREPO and VPATREPE registers.
This allows a different number of VPAT repetitions to be pro-
grammed on odd and even lines. Note that only the number of
repeats can be different in odd and even lines, but the VPAT
group remains the same.
Additionally, the HBLK signal can also be alternated for odd
and even lines. When the HBLKALT register is set high, the
HBLK TOG1 and HBLK TOG2 positions will be used on odd
lines, and the HBLK TOG3 to HBLK TOG6 positions will be
used on even lines. This allows the HBLK interval to be adjusted
on odd and even lines if needed.
Figure 38 shows an example of a VPAT repetition alternation
and a HBLK alternation used together. It is also possible to use
the VPAT and HBLK alternation separately.
HD
VPATREPO = 2
XV1
VPATREPE = 5
XV2
Second Vertical Pattern Group during VSG Active Line
Most CCDs require additional vertical timing during the sensor
gate (SG) line. The AD9925 supports the option to output a
second vertical pattern group for XV1 to XV8 during the line
when the sensor gates XSG1 to XSG6 are active. Figure 39 shows
a typical SG line that includes two separate sets of vertical pattern
group for XV1 to XV6. The vertical pattern group at the start of
the SG line is selected in the same manner as the other regions,
using the appropriate VSEQSEL register. The second vertical
pattern group, unique to the SG line, is selected using the
VPATSECOND register, located with the field registers. The
start position of the second VPAT group uses the VPATLEN
register from the selected VPAT registers. Because the VPATLEN
register is used as the start position and not as the VPAT length,
it is not possible to program multiple repetitions for the second
VPAT group.
VPATREPO = 2
XV6
HBLK
TOG1
TOG2
TOG3
TOG4
TOG1
NOTES
1. THE NUMBER OF REPEATS FOR THE VERTICAL PATTERN GROUP MAY BE ALTERNATED ON ODD AND EVEN LINES.
2. THE HBLK TOGGLE POSITIONS MAY BE ALTERNATED BETWEEN ODD AND EVEN LINES, IN ORDER TO
GENERATE DIFFERENT HBLK PATTERNS FOR ODD/EVEN LINES.
Figure 38. Odd/Even Line Alteration of VPAT Repetitions and HBLK Toggle Positions
HD
XSG
XV1
XV2
START POSITION FOR SECOND VPAT GROUP
USES VPATLEN REGISTER
TOG2
XV6
SECOND VPAT GROUP
Figure 39. Example of Second VPAT Group during Sensor Gate Line
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