UG-515 Datasheet, PDF (3/28 Pages) Analog Devices – Full-featured evaluation board

Evaluation Board User Guide
EVAL-ADAS3023EDZ
EVALUATION BOARD HARDWARE
OVERVIEW
The EVAL-ADAS3023EDZ evaluation board is designed to
offer simple evaluation of this integrated device. From a block
diagram perspective, the board uses a set of analog input test
points (or an IDC header), some passive footprints for RC
filtering and external reference, the ADAS3023 device, a serial
interface to the on-board FPGA, and power that can be
supplied locally or via EVAL-CED1Z or externally. Note that
the ADAS3023 device also has an on-chip reference; however,
external circuitry is provided for those who need to test other
suitable options.
The small prototyping area can be useful for building additional
circuitry, if desired. Each block has a specific function as
defined in the following sections.
DEVICE DESCRIPTION
Manufactured using the Analog Devices patented high voltage
iCMOS® process, the ADAS3023 is a complete data acquisition
system (DAS) on a single chip that is capable of converting two
channels simultaneously up to 500 kSPS. This part allows the
differential voltage range up to ±20.48 V when using ±15 V
supplies. The ADAS3023 can resolve the full-scale differential
voltages of ±2.56 V, ±5.12 V, ±10.24 V, and ±20.48 V, and it can
be configured to sample two, four, six, or eight channels
simultaneously.
The key difference between the ADAS3022 and ADAS3023
is that the ADAS3023 does not offer the AUX± channels and
temperature sensor (using the CFG register) In addition, the
BUSY/SDO2 (Pin 19) functionality of the ADAS3023 is
different.
The ADAS3022/ADAS3023 devices become pin compatible
and can be exchanged on the same footprint if the no connect
(NC) pins (Pin 14/Pin 29/Pin 30 on the ADAS3022) and AUX±
(Pin 5 and Pin 40 on the ADAS3022) are tied to AGND, and if
the SDO2 (using the CFG register) of the ADAS3023 is not
enabled, so that the user can actually work with either one of
these options using the same evaluation board. Leaving these
pins floating is not recommended. Note that the differential
paired mode does not exist in the ADAS3023 and, therefore, its
2/4/6/8 channels are always referenced to COM.
The ADAS3023 is an ideal replacement for a typical 16-bit,
simultaneous sampling precision data acquisition system that
simplifies the design challenges by eliminating signal buffering,
level shifting, amplification/attenuation, common-mode
rejection, settling time, or any of the other analog signal
conditioning challenges while allowing smaller form factor,
faster time to market, and lower costs.
Data communication to and from the ADAS3023 occurs
asynchronously without any pipeline delay using a common
4-wire serial interface compatible with SPI, FPGA, and DSP.
A rising edge on CNV samples the differential analog inputs of
a channel or channel pair. The ADAS3023 configuration register
allows the user to configure the number of enabled channels, the
differential input voltage range, and the interface mode using the
evaluation board and software as detailed in this user guide.
Complete specifications for the ADAS3023 are provided in the
product data sheet and should be consulted in conjunction with
this user guide when using the evaluation board. Full details on
the EVAL-CED1Z are available on the Analog Devices website.
Table 1. Typical Input Range Selection
Single-Ended Signals¹ Input Range, VIN (V)
0 V to 1 V
±1.28 V
0 V to 2.5 V
±2.56 V
0 V to 5 V
±5.12 V
0 V to 10 V
±10.24 V
1 _{See the ADAS3023 data sheet for more information}
JUMPERS, SOLDER PADS, AND TEST POINTS
Numerous solder pads and test points are provided on the
evaluation board and are detailed fully in Table 4, Table 5,
and Table 6. Note the nomenclature for this evaluation board
for a signal that is also connected to an IDC connector would
be signal_I. The two 3-pin user selectable jumpers are used for
the ADCs reference selection and are fully described in the
Reference section.
ANALOG INTERFACE
The analog interface is provided with test points for each of the
analog inputs IN[7:0] and COM (that is, IN0_I is common to
both the test point and to P1). The passive device footprints
can be used for filtering, if desired. A simple RC filter made up
of 22 Ω and 2700 pF NPO capacitors is provided. Note that
the use of stable dielectric capacitors, such as NPO or COG, is
required in the analog signal path to preserve the ADAS3023
distortion. Using X5R or other capacitors in the analog signal
path greatly reduces the performance of the system. Also, note
that many bench top arbitrary waveform generators (AWGs)
use 12-bit or 14-bit digital-to-analog converter outputs such
that the 16-bit ADAS3023 devices digitize this directly resulting
in erroneous looking data. If such an AWG is used, a high-order
band-pass filter should be used to filter the unwanted noise
from these sources.
The P31 center pin is connected to the ADAS3023 COM input,
which can be routed to P1 or GND using P31. For channel to
COM configuration, set the jumper across Pin 1 and Pin 2 to
route to P1. For channel pairs configuration, set the jumper
across Pin 2 to Pin 3 to route to GND. This is useful for single-
ended applications.
For dynamic performance, an FFT test can be done by applying
a very low distortion ac source, such as an Audio Precision
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