UG-515 Datasheet, PDF (1/28 Pages) Analog Devices – Full-featured evaluation board

Evaluation Board User Guide
EVAL-ADAS3023EDZ
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: [phone] • Fax: [phone] • www.analog.com
Evaluation Board for the ADAS3023 16-Bit, 8-Channel,
Simultaneous Sampling Data Acquisition System
FEATURES
Full-featured evaluation board for the ADAS3023
Versatile analog signal conditioning circuitry
On-board reference, clock oscillator, and buffers
converter, and precision 4.096 V reference. It is capable of
converting two channels simultaneously up to 500,000 samples per
second (500 kSPS) throughput.
Converter evaluation and development board (EVAL-CED1Z)
compatible
PC software for control and data analysis (time and
frequency domain)
KIT CONTENTS
The evaluation board is designed to demonstrate the perform-
ance of the ADAS3023 and to provide an easy-to-understand
interface for a variety of system applications. A full description
of this product is available in the product data sheet and should
be consulted when utilizing this evaluation board.
EVAL-ADAS3023EDZ evaluation board
The evaluation board is intended to be used with the Analog
ADDITIONAL EQUIPMENT NEEDED
EVAL-CED1Z board
Precision signal source
Devices, Inc., converter evaluation and development (CED)
board, EVAL-CED1Z, a USB-based capture board connected
to P4, the 96-pin interface.
World-compatible 7 V dc supply (enclosed with EVAL-CED1Z)
On-board components include a high precision, buffered band
USB cable
EVALUATION BOARD DESCRIPTION
The EVAL-ADAS3023EDZ is an evaluation board for the
ADAS3023 16-bit data acquisition system (DAS). This device
integrates an 8-channel low leakage track and hold, a high
impedance programmable gain instrumentation amplifier (PGIA)
stage with high common-mode rejection, a precision 16-bit
gap 4.096 V reference (ADR434), a reference buffer (AD8032),
passive signal conditioning circuitry, and an FPGA for
deserializing the serial conversion results and configuring
the ADAS3023 via a 4-wire serial interface.
The P3 connector allows users to test their own interface with
or without the optional Altera FPGA, U6 (programmed using
the P2 and passive serial EEPROM, U5).
successive approximation (no latency) analog-to-digital
ADAS3023
PROTOTYPE AREA
FPGA
PROGRAMMING
PORT
FPGA
96-PIN
INTERFACE
ANALOG
INPUTS
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
POWER
SERIAL
INTERFACE
40-PIN IDC
Figure 1. EVAL-ADAS3023EDZ Evaluation Board
Rev. A | Page 1 of 28