EZLINX-IIIDE-EBZ Datasheet, PDF (3/15 Pages) Analog Devices – ezLINX™Hardware User Guide

ezLINX™Hardware User
Guide
iCoupler® Isolated Interface Development
Environment
SYSTEM ARCHITECTURE
The system architecture Block diagram of the ezLINX hardware
is shown in Figure 2. An extender connector, Hirose FX8 120P-
SV(91), is added for additional functionality. The Ethernet
option is not fitted on the standard ezLINX hardware.
Figure 2. ezLINX Hardware Block diagram
ISOLATED CAN
The Isolated CAN port is implemented using the ADM3053
Signal and Power isolated CAN transceiver. The ADM3053
connects to CAN0 of the ADSP-BF548 and is capable of
functioning at data rates of up to 1Mbit/s. Figure 3 shows a
circuit diagram of the implementation of the ADM3053 on the
ezLINX hardware.
The CAN Node can be configured using jumpers JP17 and
JP18. When both jumpers JP17 and JP18 is fitted, the CAN
node is split terminated with 120Ω and a common mode
capacitor o f 47nF. If termination is not required, remove JP17
and JP18. Table x show jumper configurations for all the
interfaces on ezLINX.
The 5V supply is connected to VCC(pin 8) to power the
isoPower isolated Power supply of the ADM3053. This
generates an isolated 5V on the Visoout pin(pin 12) of the
ADM3053 and needs to is connected to the Visoin pin(pin 19).
The 3.3Vsupply is connected to the VIO pin(pin 6) to power the
iCoupler signal isolation that needs to be compatible with the
3.3V logic of the Blackfin ADSP-BF548. The RS pin(pin 18) is
connected through a 0Ω resistor to CAN_ISO_GND in order to
de-activate slew rate limiting,
A four pin screw terminal connector, J8 is used for easy access
to the CANH(Pin 1), CANL(Pin 3) and CAN_ISO_GND(Pin 2
and 4) connections.
Application note AN-1123 provides more information on
implementing CAN Nodes.
Rev. PrA | Page 3 of 15