CN-0243 Datasheet, PDF (3/8 Pages) Analog Devices – High Dynamic Range RF Transmitter Signal Chain Using Single External Frequency Reference for DAC Sample Clock and IQ Modulator LO Generation

Circuit Note
CN-0243
FREQUENCY (x-FDATA)
–4x
–3x
–2x
–1x
DC
1x
2x
3x
4x
0dB
–20dB
–40dB
–60dB
–80dB
–100dB
–245.76
–184.32
–122.88
–61.44
DC
FREQUENCY
61.44
122.88
184.32
Figure 3. DAC Output Spectrum Using 4× Interpolation, the Thin Blue Line Represents the DAC Interpolation Transfer Function
245.76
(sampled) domain and is synthesized by the DAC into the
analog domain. The results of this step are images and
distortion products generated by the DAC. As shown in Figure 2,
an ideal DAC with no distortion will generate images of a
baseband signal that must be filtered before being modulated.
The use of interpolation filters such as those in the AD9122 can
suppress most of the image energy, but an analog interface filter
between DAC and modulator will still be necessary. There is a
trade-off, however, between the order of the DAC interpolation
and the order of the analog filter. Higher DAC interpolation
rates mean lower required analog filter order and vice versa.
Figure 3 shows what the DAC output spectrum looks like when
using 4× interpolation, as an example.
A Multitude of Spurious Components at RF
The signal chain can add significant spurious components to the
spectrum, due both to modulation products, distortion
products, and integer multiples of the LO frequency. It we take
into account all of the possibilities for spurious which we have
discussed, the spurious content can consist of
(j × LO_freq) + (k × DAC_sample_rate) +
and load impedances, as well as parasitics in the signal
traces, may add unwanted ripple in the filter pass band.
3. PCB layout. As shown in Figure 4, the I and Q
baseband inputs on the ADRF6702 IQ modulator are
located on opposite edges of the device. Note the filter
layout area within the dotted circles. To route the DAC
output signals to these pins, the traces must travel up
and then back down to get to the baseband pins on the
ADRF6702. These differential signal traces should be
of equal length, and any changes in direction of the
trace should be done by using 45° bends. If these
recommendations are not implemented, in-band
ripple, phase, or amplitude response may be degraded
in the filter response. Note that with this filter
topology, the capacitors can be used differentially
(across the signal path) or they can be used in a
common-mode connection by placing the filter caps
from the signal path pads to ground pads. There are
conditions (discussed later in this circuit note) where
common-mode capacitors improve performance vs.
differential-mode capacitors.
(l × DAC_NCO_freq) + (m × DAC_input_IF)
Where j, k, l, and m are integers over the range of negative
infinity to positive infinity.
DAC/Modulator Passive Interface Filter
The key to reducing the overall spurious spectrum is the analog
interface filter between the DAC and the IQ modulator. The
design of the interface filter between the DAC and IQ modulator
must take into account multiple aspects of performance:
1. Filter topology, order, and 3 dB cutoff frequency
2. At dc, the DAC sees a load impedance equal to the
DAC termination resistors (typically a 100 Ω
differential impedance) in parallel with the input
impedance of the IQ modulator. The IQ modulator
impedance is often >1kΩ, so a shunt resistor is often
used across the IQ modulator inputs to create a similar
load impedance to the source. Unequal filter source
Figure 4. PCB Layout for Transmitter, DAC/Mod Interface Filter Section
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