ADSP-21065LKSZ-264 Datasheet, PDF (29/44 Pages) Analog Devices – DSP Microcomputer

ADSP-21065L
CLKIN
t_SDRLC
DMARx
DMAGx
t_WDR
t_DMARLL
t_DDGL
t_SDRHC
t_DMARH
t_WDGL
t_HDGC
t_WDGH
TRANSFERS BETWEEN ADSP-2106x INTERNAL MEMORY AND EXTERNAL DEVICE
DATA (FROM
ADSP-2106x TO
EXTERNAL DEVICE)
DATA (FROM
EXTERNAL DEVICE
TO ADSP-2106x)
t _DATDRH
t _SDATDGL
t_VDATDGH
t _DATRDGH
t_HDATIDG
TRANSFERS BETWEEN EXTERNAL DEVICE AND EXTERNAL MEMORY*(EXTERNAL HANDSHAKE MODE)
WR
(EXTERNAL DEVICE
TO EXTERNAL
MEMORY)
RD
(EXTERNAL
MEMORY TO
EXTERNAL DEVICE)
t_DGWRL
t_DGRDL
t_DADGH
t _DGWRH
t_DRDGH
t_DGWRR
t_DGRDR
t_DDGHA
ADDRESS
SW, MSx
*“MEMORY READ – BUS MASTER,” “MEMORY WRITE – BUS MASTER,” AND “SYNCHRONOUS READ/WRITE – BUS MASTER”
TIMING SPECIFICATIONS FOR ADDR_23–0, RD, WR, SW, MS_3–0, AND ACK ALSO APPLY HERE.
Figure 18. DMA Handshake Timing
REV. C
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