ADSP-BF539_08 Datasheet, PDF (27/60 Pages) Analog Devices – Blackfin Embedded Processor

ADSP-BF539/ADSP-BF539F
ELECTRICAL CHARACTERISTICS
Parameter¹
Test Conditions
Min
Typ
V_OH
High Level Output Voltage²
@ V_DDEXT = +3.0 V, I_OH = –0.5 mA
V_OL
Low Level Output Voltage²
@ V_DDEXT = 3.0 V, I_OL = 2.0 mA
I_IH
High Level Input Current³
@ V_DDEXT = Maximum, V_IN = V_DD Maximum
I_IHP
High Level Input Current JTAG⁴ @ V_DDEXT = Maximum, V_IN = V_DD Maximum
I_IL
Low Level Input Current³
@ V_DDEXT = Maximum, V_IN = 0 V
I_OZH
Three-State Leakage Current⁵
@ V_DDEXT = Maximum, V_IN = V_DD Maximum
I_OZL
Three-State Leakage Current⁵
@ V_DDEXT = Maximum, V_IN = 0 V
C_IN
Input Capacitance^{6, 7}
f_CCLK = 1 MHz, T_AMBIENT = 25°C, V_IN = 2.5 V
2.4
4
I_DDIHIBERNATE V_DDINT Current in Hibernate State V_DDEXT = 3.65 V with Voltage Regulator Off
50
(V_DDINT = 0 V)
I_DDDEEPSLEEP8 V_DDINT Current in Deep Sleep Mode V_DDINT = 0.95 V, T_JUNCTION = 25°C
28
I_DDSLEEP
V_DDINT Current in Sleep Mode
V_DDINT = 0.95 V, T_JUNCTION = 25°C @ f_SCLK = 50 MHz
32
I_{DD_TYP8,} ⁹
V_DDINT Current Dissipation (Typical) V_DDINT = 0.95 V, f_CCLK = 50 MHz, T_JUNCTION = 25°C
47
I_{DD_TYP8,} ⁹
V_DDINT Current Dissipation (Typical) V_DDINT = 1.2 V, f_CCLK = 533 MHz, T_JUNCTION = 25°C
227
I_DDRTC
V_DDRTC Current
V_DDRTC = 3.3 V, T_JUNCTION = 25°C
20
1 _{Specifications subject to change without notice.}
2 _{Applies to output and bidirectional pins.}
3 _{Applies to input pins except JTAG inputs.}
4 _{Applies to JTAG input pins (TCK, TDI, TMS, TRST).}
5 _{Applies to three-statable pins.}
6 _{Applies to all signal pins.}
7 _{Guaranteed, but not tested.}
8 _{See Power Dissipation on Page 52.}
9 _{Processor executing 75% dual MAC, 25% ADD with moderate data bus activity.}
Max Unit
V
0.4 V
10.0 μA
50.0 μA
10.0 μA
10.0 μA
10.0 μA
8
pF
μA
mA
mA
mA
mA
μA
Rev. A | Page 27 of 60 | February 2008