ADSP-21369KSWZ-2A Datasheet, PDF (25/60 Pages) Analog Devices – SHARC Processors

ADSP-21367/ADSP-21368/ADSP-21369
Timer WDTH_CAP Timing
The following specification applies to Timer0, Timer1, and
Timer2 in WDTH_CAP (pulse width count and capture) mode.
Timer signals are routed to the DPI_P14–1 pins through the
DPI SRU. Therefore, the specification provided in Table 18 is
valid at the DPI_P14–1 pins.
Table 18. Timer Width Capture Timing
Parameter
Switching Characteristic
t_PWI
Timer Pulse Width
Min
2 × t_PCLK
Max
2 × (2³¹ – 1) × t_PCLK
Unit
ns
DPI_P14–1
(TIMER2–0)
t_PWI
Figure 13. Timer Width Capture Timing
Pin to Pin Direct Routing (DAI and DPI)
For direct pin connections only (for example, DAI_PB01_I to
DAI_PB02_O).
Table 19. DAI/DPI Pin to Pin Routing
Parameter
Min
Max
Unit
Timing Requirement
t_DPIO
Delay DAI/DPI Pin Input Valid to DAI/DPI Output Valid
1.5
12
ns
DAI_Pn
DPI_Pn
DAI_Pm
DPI_Pm
t_DPIO
Figure 14. DAI/DPI Pin to Pin Direct Routing
Rev. E | Page 25 of 60 | July 2009