ADSP-SC589 Datasheet, PDF (24/64 Pages) –

2.23 Power-On-Self Test
The Power-On-Self-Test (POST) program tests all EZ-Board peripherals and validates functionality
as well as connectivity to the processor. Once assembled, each EZ-Board is fully tested for an
extended period of time with POST. All EZ-Boards are shipped with POST burned into flash
memory. The POST is executed by resetting the board and pressing the proper push button(s)
sequence. The POST also can be used as a reference for a custom software design or hardware
troubleshooting.
The source code for the POST program is included in the ADSP-SC589 Board Support Package along
with the readme.txt file that describes how to configure the board run POST.
2.24 Expansion Interface
The expansion interface allows a custom-design daughter board to be tested across various hardware
platforms that have the same expansion interface.
The Expansion Interface III (EI3) implemented on the ADSP-SC589 EZ-Board consists of five
connectors: P1A, P1B, P1C, P2A, and P3A. The connectors contain a majority of the processor's
signals. For pinout information, go to Appendix B - Schematics.
Limits to current and interface speed must be taken into consideration when using the expansion
interface. Current for extenders connected to the EI3 connectors can be sourced from the EZ-Board;
therefore, the current should be limited to 250 mA for 5V, and 300 mA from the 3.3V planes. If more
current is required, a separate power connector and a regulator must be designed on the daughter card.
Additional circuitry implemented on extender cards can add extra loading to signals, decreasing their
maximum effective speed.
Analog Devices does not support and is not responsible for the effects of additional circuitry.
2.25 Power Architecture
The ADSP-SC589 EZ-Board has four primary voltage domains: 1.1V, 1.5V, 1.8V and 3.3V. The
power input is a 5V wall adaptor.
The Analog Devices ADP5054 controller provides four voltage levels—3.3V for the VDD_EXT
signal and the 3.3V power requirements of the board, 1.1V for the VDD_INT signal, 1.5V for the
DDR3 interface and 1.8V for the DP83865 PHY.
The voltage levels can be measured using the INA3221 IC for 3.3V, VDD_INT, and 1.5V. Current
consumption of the power rail could be measured with this same device when the corresponding
jumper is removed. See Power Measurements for more information.
ADSP-SC589 EZ-Board® Evaluation System Manual
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