5962-8770102RA Datasheet, PDF (2/8 Pages) Analog Devices – CMOS Dual 8-Bit Buffered Multiplying DAC

AD7528–SPECIFICATIONS (VREF A = VREF B = +10 V; OUT A = OUT B = O V unless otherwise noted)
Parameter
STATIC PERFORMANCE²
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Temperature Coefficient³
∆Gain/∆Temperature
Output Leakage Current
OUT A (Pin 2)
OUT B (Pin 20)
Input Resistance (VREF A, VREF B)
VREF A/VREF B Input Resistance
Match
DIGITAL INPUTS⁴
Input High Voltage
V_IH
Input Low Voltage
V_IL
Input Current
I_IN
Input Capacitance
DB0–DB7
WR, CS, DAC A/DAC B
SWITCHING CHARACTERISTICS³
Chip Select to Write Set Up Time
tCS
Chip Select to Write Hold Time
tCH
DAC Select to Write Set Up Time
tAS
DAC Select to Write Hold Time
t_AH
Data Valid to Write Set Up Time
t_DS
Data Valid to Write Hold Time
t_DH
Write Pulsewidth
t_WR
POWER SUPPLY
IDD
Version¹
VDD = +5 V
TA = +25°C TMIN, TMAX
VDD = +15 V
TA= +25°C TMIN, TMAX
Units
Test Conditions/Comments
All
8
J, A, S ± 1
K, B, T ± 1/2
L, C, U ± 1/2
All
±1
J, A, S ± 4
K, B, T ± 2
L, C, U ± 1
All
± 0.007
All
± 50
All
± 50
All
8
15
All
±1
8
±1
± 1/2
± 1/2
±1
±6
±4
±3
± 0.007
± 400
± 400
8
15
±1
8
8
±1
±1
± 1/2
± 1/2
± 1/2
± 1/2
±1
±1
±4
±5
±2
±3
±1
±1
± 0.0035
± 50
± 50
8
15
±1
± 0.0035
± 200
± 200
8
15
±1
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
%/°C max
nA max
nA max
kΩ min
kΩ max
% max
This is an Endpoint Linearity Specification
All Grades Guaranteed Monotonic Over
Full Operating Temperature Range
Measured Using Internal RFB A and RFB B
Both DAC Latches Loaded with 11111111
Gain Error is Adjustable Using Circuits
of Figures 4 and 5
DAC Latches Loaded with 00000000
Input Resistance TC = –300 ppm/°C, Typical
Input Resistance is 11 kΩ
All
2.4
2.4
All
0.8
0.8
All
±1
± 10
All
10
10
All
15
15
All
90
100
All
0
0
All
90
100
All
0
0
All
80
90
All
0
0
All
90
100
All
2
2
All
100
500
13.5
13.5
1.5
1.5
±1
± 10
10
10
15
15
60
80
10
15
60
80
10
15
30
40
0
0
60
80
2
2
100
500
V min
V max
µA max
pF max
pF max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
mA max
µA max
V_IN = 0 or V_DD
See Timing Diagram
See Figure 3
All Digital Inputs VIL or VIH
All Digital Inputs 0 V or VDD
AC
PERFORMANCE
CHARACTERISTICS⁵
(Measured Using Recommended P.C. Board Layout (Figure 7) and AD644 as
Output Amplifiers)
Parameter
V_DD = +5 V
V_DD = +15 V
Version¹ T_A = +25°C T_MIN, T_MAX T_A= +25°C T_MIN, T_MAX Units
Test Conditions/Comments
DC SUPPLY REJECTION (∆GAIN/∆VDD)
All
0.02
0.04
0.01
0.02
% per % max ∆VDD = ± 5%
CURRENT SETTLING TIME²
All
350
400
180
200
ns max
To 1/2 LSB. OUT A/OUT B Load = 100 Ω.
WR = CS = 0 V. DB0–DB7 = 0 V to VDD or
VDD to 0 V
PROPAGATION DELAY (From Digital In-
put to 90% of Final Analog Output Current) All
220
270
80
V_REF A = V_REF B = +10 V
100
ns max
OUT A, OUT B Load = 100 Ω C_EXT = 13 pF
WR = CS = 0 V DB0–DB7 = 0 V to V_DD or
V_DD to 0 V
DIGITAL-TO-ANALOG GLITCH IMPULSE All
160
440
nV sec typ For Code Transition 00000000 to 11111111
OUTPUT CAPACITANCE
COUTA
COUTB
COUTA
COUTB
All
50
50
120
120
50
50
50
pF max
DAC Latches Loaded with 00000000
50
50
50
pF max
120
120
120
pF max
DAC Latches Loaded with 11111111
120
120
120
pF max
AC FEEDTHROUGH⁶
VREF A to OUT A
VREF B to OUT B
All
–70
–70
–65
–70
–65
dB max
VREF A, VREF B = 20 V p-p Sine Wave
–65
–70
–65
dB max
@ 100 kHz
–2–
REV. B