ADSP-TS201S_06 Datasheet, PDF (19/48 Pages) Analog Devices – TigerSHARC-R Embedded Processor

ADSP-TS201S
Table 13. Impedance Control Selection
CONTROLIMP1-0
00 (recommended)
01
10 (default)
11
Driver Mode
Normal
Reserved
A/D Mode
Reserved
Table 14. Drive Strength/Output Impedance Selection
DS2–0
Pins
Drive
Strength¹
000
Strength 0 (11.1%)
001
Strength 1 (23.8%)
010
Strength 2 (36.5%)
011
Strength 3 (49.2%)
100
Strength 4 (61.9%)
101 (default) Strength 5 (74.6%)
110
Strength 6 (87.3%)
111
Strength 7 (100%)
1 _{CONTROLIMP1 = 0, A/D mode disabled.}
2 _{CONTROLIMP1 = 1, A/D mode enabled.}
Output
Impedance ²
26 Ω
32 Ω
40 Ω
50 Ω
62 Ω
70 Ω
96 Ω
120 Ω
Table 15. Pin Definitions—Power, Ground, and Reference
Signal
Type
Term
Description
V_DD
V_{DD_A}
V_{DD_IO}
V_{DD_DRAM}
V_REF
P
na
V_DD pins for internal logic.
P
na
V_DD pins for analog circuits. Pay critical attention to bypassing this supply.
P
na
V_DD pins for I/O buffers.
P
na
V_DD pins for internal DRAM.
I
na
Reference voltage defines the trip point for all input buffers, except SCLK, RST_IN,
POR_IN, IRQ3–0, FLAG3–0, DMAR3–0, ID2–0, CONTROLIMP1–0, LxDATO3–0P/N,
LxCLKOUTP/N, LxDATI3–0P/N, LxCLKINP/N, TCK, TDI, TMS, and TRST. V_REF can be
connected to a power supply or set by a voltage divider circuit as shown in Figure 6.
For more information, see Filtering Reference Voltage and Clocks on Page 10.
SCLK_V_REF
I
na
System Clock Reference. Connect this pin to a reference voltage as shown in Figure 7.
For more information, see Filtering Reference Voltage and Clocks on Page 10.
V_SS
G
na
Ground pins.
NC
—
nc
No Connect. Do not connect these pins to anything (not to any supply, signal, or each
other). These pins are reserved and must be left unconnected.
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5 kΩ; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on DSP ID = 0; pu_0 = internal pull-up 5 kΩ on DSP ID = 0; pu_od_0 = internal
pull-up 500 Ω on DSP ID = 0; pd_m = internal pull-down 5 kΩ on DSP bus master; pu_m = internal pull-up 5 kΩ on DSP bus master; pu_ad
= internal pull-up 40 kΩ. For more pull-down and pull-up information, see Electrical Characteristics on Page 22.
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 kΩ to V_SS; epu = external pull-up approx-
imately 5 kΩ to V_{DD_IO}, nc = not connected; na = not applicable (always used); V_{DD_IO} = connect directly to V_{DD_IO}; V_SS = connect directly to V_SS
Rev. C | Page 19 of 48 | December 2006