ADSP-21161N Datasheet, PDF (18/60 Pages) Analog Devices – DSP Microcomputer

ADSP-21161N
SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
Test Conditions
C Grade
Min Max
K Grade
Min Max
Unit
V_DDINT
AV_DD
V_DDEXT
V_IH
V_IL
T_CASE
Internal (Core) Supply Voltage
Analog (PLL) Supply Voltage
External (I/O) Supply Voltage
High Level Input Voltage¹
Low Level Input Voltage¹
Case Operating Temperature²
@ V_DDEXT = max
@ V_DDEXT = min
1.71 1.89
1.71 1.89
V
1.71 1.89
1.71 1.89
V
3.13 3.47
3.13 3.47
V
2.0 V_DDEXT+ 0.5 2.0 V_DDEXT+ 0.5 V
–0.5 +0.8
–0.5 +0.8
V
–40 +105
0 +85
°C
Specifications subject to change without notice.
1 _{Applies to input and bidirectional pins: DATA47–16, ADDR23–0, MS3–0, RD, WR, ACK, SBTS, IRQ2–0, FLAG11–0, HBG, HBR, CS, DMAR1,}
DMAR2, BR6–1, ID2–0, RPBA, PA, BRST, FSx, DxA, DxB, SCLKx, RAS, CAS, SDWE, SDCLK0, LxDAT7–0, LxCLK, LxACK, SPICLK, MOSI,
MISO, SPIDS, EBOOT, LBOOT, BMS, SDCKE, CLK_CFGx, CLKDBL, CLKIN, RESET, TRST, TCK, TMS, TDI.
2 _{See Thermal Characteristics on Page 52 for information on thermal specifications.}
ELECTRICAL CHARACTERISTICS
Parameter
Test Conditions
Min Max Unit
V_OH
V_OL
I_IH
I_IL
I_IHC
I_ILC
I_IKH
I_IKL
I_IKH-OD
I_IKL-OD
I_ILPU
I_OZH
I_OZL
I_OZLPU1
I_OZLPU2
I_OZHPD1
I_OZHPD2
I_DD-INPEAK
I_DD-INHIGH
I_DD-INLOW
I_DD-IDLE
AI_DD
C_IN
High Level Output Voltage¹
Low Level Output Voltage¹
High Level Input Current^{3, 4}
Low Level Input Current³
CLKIN High Level Input Current⁵
CLKIN Low Level Input Current⁵
Keeper High Load Current⁶
Keeper Low Load Current⁶
Keeper High Overdrive Current^{6, 7, 8}
Keeper Low Overdrive Current^{6, 7, 8}
Low Level Input Current Pull-Up⁴
Three-State Leakage Current^{9, 10, 11}
Three-State Leakage Current^{9, 12, 13}
Three-State Leakage Current Pull-Up1¹⁰
Three-State Leakage Current Pull-Up2¹¹
Three-State Leakage Current Pull-Down1¹²
Three-State Leakage Current Pull-Down2¹³
Supply Current (Internal)^{14, 15}
Supply Current (Internal)^{15, 16}
Supply Current (Internal)^{15, 17}
Supply Current (Idle)^{15, 18}
Supply Current (Analog)¹⁹
Input Capacitance^{20, 21}
Specifications subject to change without notice.
@ V_DDEXT = min, I_OH = –2.0 mA²
@ V_DDEXT = min, I_OL = 4.0 mA²
2.4
V
0.4 V
@ V_DDEXT = max, V_IN = V_DDEXT max
10 µA
@ V_DDEXT = max, V_IN = 0 V
10 µA
@ V_DDEXT = max, V_IN = V_DDEXT max
35 µA
@ V_DDEXT = max, V_IN = 0 V
35 µA
@ V_DDEXT = max, V_IN = 2.0 V
–250 –100 µA
@ V_DDEXT = max, V_IN = 0.8 V
50 200 µA
@ V_DDEXT = max
–300
µA
@ V_DDEXT = max
300
µA
@ V_DDEXT = max, V_IN = 0 V
350 µA
@ V_DDEXT= max, V_IN = V_DDEXT max
10 µA
@ V_DDEXT = max, V_IN = 0 V
10 µA
@ V_DDEXT = max, V_IN = 0 V
500 µA
@ V_DDEXT = max, V_IN = 0 V
350 µA
@ V_DDEXT = max, V_IN = V_DDEXT max
350 µA
@ V_DDEXT = max, V_IN = V_DDEXT max
500 µA
t_CCLK = 10.0 ns, V_DDINT = max
900 mA
t_CCLK = 10.0 ns, V_DDINT = max
650 mA
t_CCLK = 10.0 ns, V_DDINT = max
500 mA
t_CCLK = 10.0 ns, V_DDINT = max
400 mA
@ AV_DD = max
10 mA
f_IN = 1 MHz, T_CASE = 25°C, V_IN = 1.8 V
4.7 pF
1 _{Applies to output and bidirectional pins: DATA47–16, ADDR23–0, MS3–0, RD, WR, ACK, DQM, FLAG11–0, HBG, REDY, DMAG1, DMAG2,}
BR6–1, BMSTR, PA, BRST, FSx, DxA, DxB, SCLKx, RAS, CAS, SDWE, SDA10, LxDAT7–0, LxCLK, LxACK, SPICLK, MOSI, MISO, BMS,
SDCLKx, SDCKE, EMU, XTAL, TDO, CLKOUT, TIMEXP, RSTOUT.
2 _{See Output Drive Currents on Page 51 for typical drive current capabilities.}
3 _{Applies to input pins: DATA47–16, ADDR23–0, MS3–0, SBTS, IRQ2–0, FLAG11–0, HBG, HBR, CS, BR6–1, ID2–0, RPBA, BRST, FSx, DxA, DxB,}
SCLKx, RAS, CAS, SDWE, SDCLK0, LxDAT7–0, LxCLK, LxACK, SPICLK, MOSI, MISO, SPIDS, EBOOT, LBOOT, BMS, SDCKE, CLK_CFGx,
CLKDBL, TCK, RESET, CLKIN.
4 _{Applies to input pins with 20 kΩ internal pull-ups: RD, WR, ACK, DMAR1, DMAR2, PA, TRST, TMS, TDI.}
5 _{Applies to CLKIN only.}
6 _{Applies to all pins with keeper latches: ADDR23–0, DATA47–0, MS3–0, BRST, CLKOUT.}
7 _{Current required to switch from kept high to low or from kept low to high.}
8 _{Characterized, but not tested.}
–18–
REV. A