ADSP-2186L_15 Datasheet, PDF (15/36 Pages) Analog Devices – DSP Microcomputer

ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . –0.5 V to V_DD + 0.5 V
Output Voltage Swing . . . . . . . . . . . . . –0.5 V to V_DD + 0.5 V
Operating Temperature Range (Ambient) . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (5 sec) LQFP . . . . . . . . . . . . . . . . . 280°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ADSP-2186L
ESD SENSITIVITY
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADSP-2186L features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
TIMING PARAMETERS
GENERAL NOTES
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
TIMING NOTES
Switching characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use
switching characteristics to ensure that any timing requirement
of a device connected to the processor (such as memory) is
satisfied.
Timing requirements apply to signals that are controlled by
circuitry external to the processor, such as the data input for a
read operation. Timing requirements must be met to guarantee
that the processor operates correctly with other devices.
MEMORY TIMING SPECIFICATIONS
The table below shows common memory device specifications
and the corresponding ADSP-2186L timing parameters, for
your convenience.
Memory
Device
Specification
Address Setup to
Write Start
Address Setup to
Write End
Address Hold Time
ADSP-2186L
Timing
Parameter
t_ASW
t_AW
t_WRA
Data Setup Time t_DW
Data Hold Time
t_DH
OE to Data Valid t_RDD
Address Access Time t_AA
Timing
Parameter
Definition
A0–A13, xMS Setup
before WR Low
A0–A13, xMS Setup
before WR Deasserted
A0–A13, xMS Hold
before WR Low
Data Setup before WR
High
Data Hold after WR
High
RD Low to Data Valid
A0–A13, xMS to Data
Valid
xMS = PMS, DMS, BMS, CMS, IOMS.
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
t_CK is defined as 0.5 t_CKI. The ADSP-2186L uses an input clock
with a frequency equal to half the instruction rate. For example,
a 20 MHz input clock (which is equivalent to 50 ns) yields a
25 ns processor cycle (equivalent to 40 MHz). t_CK values within
the range of 0.5 t_CKI period should be substituted for all relevant
timing parameters to obtain the specification value.
Example: t_CKH = 0.5 t_CK – 7 ns = 0.5 (25 ns) – 7 ns = 5.5 ns
REV. B
–15–