AD9681 Datasheet, PDF (11/40 Pages) Analog Devices – Octal, 14-Bit, 125 MSPS, Serial LVDS, 1.8 V Analog-to-Digital Converter

Data Sheet
VIN±x1, VIN±x2
CLK–
CLK+
DCO–1, DCO–2
DCO+1, DCO+2
FCO–1, FCO–2
FCO+1, FCO+2
D0–x
D0+x
N–1
t_A
t_EH
t_CPD
N
t_EL
AD9681
t_FCO
t_FRAME
t_PD
t_DATA
MSB D10 D9
D8
D7
D6
D5
D4
D3 D2
D1
D0 MSB D10
N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 16 N – 16
Figure 8. Wordwise DDR, One-Lane, 1× Frame, 12-Bit Output Mode
CLK+
SYNC
t_SSYNC
t_HSYNC
Figure 9. SYNC Input Timing Requirements
Rev. A | Page 11 of 40