CN-0279 Datasheet, PDF (1/5 Pages) Analog Devices – High IF Sampling Receiver Front End with Band-Pass Filter

Circuit Note
CN-0279
Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s
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Devices Connected/Referenced
AD9642 14-Bit, 250 MSPS Analog-to-Digital Converter
ADL5565
6 GHz Ultrahigh Dynamic Range Differential
Amplifier
High IF Sampling Receiver Front End with Band-Pass Filter
EVALUATION AND DESIGN SUPPORT
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit, shown in Figure 1, is a narrow, band-pass receiver
front end based on the ADL5565 ultralow noise differential
amplifier driver and the AD9642 14-bit, 250 MSPS analog-to-
digital converter (ADC).
The third-order, Butterworth antialiasing filter is optimized based
on the performance and interface requirements of the amplifier
and ADC. The total insertion loss due to the filter network and
other components is only 5.8 dB.
The overall circuit has a bandwidth of 18 MHz with a pass-band
flatness of 3 dB. The signal-to-noise ratio (SNR) and spurious-
free dynamic range (SFDR) measured with a 127 MHz analog
input are 71.7 dBFS and 92 dBc, respectively. The sampling
frequency is 205 MSPS, thereby positioning the IF input signal
in the second Nyquist zone between 102.5 MHz and 205 MHz.
CIRCUIT DESCRIPTION
The circuit accepts a single-ended input and converts it to
differential input using a wide bandwidth (3 GHz) Mini-Circuits
TC2-1T 1:2 transformer. The 6 GHz ADL5565 differential
amplifier has a differential input impedance of 200 Ω when
operating at a gain of 6 dB, and 100 Ω when operating at a
gain of 12 dB. A gain option of 15.5 dB is also available.
The ADL5565 is an ideal driver for the AD9642, and the fully
differential architecture through the band-pass filter and into
the ADC provides good high frequency common-mode rejection,
as well as minimizes second-order distortion products. The
ADL5565 provides a gain of 6 dB or 12 dB, depending on the input
connection. In the circuit, a gain of 12 dB was used to compensate
for the insertion loss of the filter network and transformer
(approximately 5.8 dB), providing an overall signal gain of 5.5 dB.
5.8dB LOSS
0.5dB LOSS
11.8dB GAIN
5.6dB LOSS
ANALOG
INPUT
+1.5dBm FS
AT 127MHz
XFMR
1:2 Z
TC2-1T
INPUT
Z = 50Ω
OVERALL
GAIN = 5.5dB
0.1µF
Z_I = 100Ω
0.1µF
+3.3V
15Ω ^0.1µF
VIP2
VIP1
VIN1
VIN2
5Ω
ADL5565
G = 12dB
5Ω
33pF
15Ω _0.1µF
1.2pF 620nH
36nH
36nH
1.2pF
620nH
217Ω
40Ω
187Ω
0.2dB LOSS
+1.8V +1.8V
AVDD DRVDD
100Ω
0.1µF
100Ω
5Ω
33pF
2.85kΩ
5Ω
FS = 1.75V
p-p DIFF
VCM
AD9642
14-BIT
205MSPS
ADC
2.5pF
INTERNAL
INPUT Z
Figure 1. 14-Bit, 250 MSPS Wideband Receiver Front End (Simplified Schematic: All Connections and Decoupling Not Shown)
Gains, Losses, and Signal Levels Measured Values for an Input Frequency of 127 MHz
Rev. 0
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