ADSP-BF535_15 Datasheet, PDF (1/44 Pages) Analog Devices – Blackfin Embedded Processor

a
Blackfin^®
Embedded Processor
ADSP-BF535
KEY FEATURES
350 MHz High Performance Blackfin Processor Core
Two 16-Bit MACs, Two 40-Bit ALUs, One 40-Bit Shifter,
Four 8-Bit Video ALUs, and Two 40-Bit Accumulators
RISC-Like Register and Instruction Model for Ease of
Programming and Compiler Friendly Support
Advanced Debug, Trace, and Performance Monitoring
1.0 V–1.6 V Core V_DD with Dynamic Power Management
3.3 V I/O
260-Ball PBGA Package
MEMORY
308K Bytes of On-Chip Memory:
16K Bytes of Instruction L1 SRAM/Cache
32K Bytes of Data L1 SRAM/Cache
4K Bytes of Scratch Pad L1 SRAM
256K Bytes of Full Speed, Low Latency L2 SRAM
Memory DMA Controller
Memory Management Unit for Memory Protection
Glueless External Memory Controllers
Synchronous SDRAM Support
Asynchronous with SRAM, Flash, ROM Support
PERIPHERALS
32-Bit, 33 MHz, 3.3 V, PCI 2.2 Compliant Bus Interface
with Master and Slave Support
Integrated USB 1.1 Compliant Device Interface
Two UARTs, One with IrDA^®
Two SPI Compatible Ports
Two Full-Duplex Synchronous Serial Ports (SPORTs)
Four Timer/Counters, Three with PWM Support
Sixteen Bidirectional Programmable Flag I/O Pins
Watchdog Timer
Real-Time Clock
On-Chip PLL with 1؋ to 31؋ Frequency Multiplier
FUNCTIONAL BLOCK DIAGRAM
JTAG TEST AND
INTERRUPT
EMULATION
CONTROLLER/
TIMER
32
WATCHDOG TIMER
L1
INSTRUCTION
MEMORY
MMU
L1
DATA
MEMORY
SYSTEM BUS
INTERFACE UNIT
B
256K BYTES L2 SRAM
64
32
32
DMA
CONTROLLER
BOOT ROM
32
32
REAL-TIME CLOCK
UART PORT 0
IrDA
UART PORT 1
TIMER0, TIMER1,
TIMER2
PROGRAMMABLE
FLAGS
USB INTERFACE
SERIAL PORTS (2)
SPI PORTS (2)
PCI BUS INTERFACE
EXTERNAL PORT
FLASH SDRAM
CONTROL
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
REV. A
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ever, no responsibility is assumed by Analog Devices for its use, nor for any
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Fax:[phone] © 2004 Analog Devices, Inc. All rights reserved.
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