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A42MX16-1PQ100ES Datasheet, PDF (56/123 Pages) Actel Corporation – 40MX and 42MX FPGA Families
40MX and 42MX FPGA Families
Table 32 •
A42MX09 Timing Characteristics (Nominal 5.0V Operation) (Continued)
(Worst-Case Commercial Conditions, VCCA = 4.75V, TJ = 70°C)
‘–3’ Speed ‘–2’ Speed ‘–1’ Speed
‘Std’ Speed
‘–F’ Speed
Parameter Description
TTL Output Module Timing5
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
tDLH
tDHL
tENZH
tENZL
tENHZ
tENLZ
tGLH
tGHL
tLSU
tLH
tLCO
Data-to-Pad HIGH
2.5
2.7
3.1
3.6
5.1 ns
Data-to-Pad LOW
2.9
3.2
3.6
4.3
6.0 ns
Enable Pad Z to HIGH
2.6
2.9
3.3
3.9
5.5 ns
Enable Pad Z to LOW
2.9
3.2
3.7
4.3
6.1 ns
Enable Pad HIGH to Z
4.9
5.4
6.2
7.3
10.2 ns
Enable Pad LOW to Z
5.3
5.9
6.7
7.9
11.1 ns
G-to-Pad HIGH
2.6
2.9
3.3
3.8
5.3 ns
G-to-Pad LOW
2.6
2.9
3.3
3.8
5.3 ns
I/O Latch Set-Up
0.5
0.5
0.6
0.7
1.0
ns
I/O Latch Hold
0.0
0.0
0.0
0.0
0.0
ns
I/O Latch Clock-to-Out (Pad-to-
5.2
5.8
6.6
7.7
10.8 ns
Pad), 64 Clock Loading
tACO
Array Clock-to-Out (Pad-to-Pad),
7.4
8.2
9.3
10.9
15.3 ns
64 Clock Loading
dTLH
Capacity Loading, LOW to HIGH
0.03
0.03
0.03
0.04
0.06 ns/pF
dTHL
Capacity Loading, HIGH to LOW
0.04
0.04
0.04
0.05
0.07 ns/pF
Notes:
1. For dual-module macros, use tPD1 + tRD1 + tPDn, tCO + tRD1 + tPDn, or tPD1 + tRD1 + tSUD, whichever is appropriate.
2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating
device performance. Post-route timing analysis or simulation is required to determine actual performance.
3. Data applies to macros based on the S-module. Timing parameters for sequential macros constructed from C-modules can be
obtained from the Timer utility.
4. Set-up and hold timing parameters for the input buffer latch are defined with respect to the PAD and the D input. External setup/
hold timing parameters must account for delay from an external PAD signal to the G inputs. Delay from an external PAD signal to
the G input subtracts (adds) to the internal setup (hold) time.
5. Delays based on 35 pF loading.
1-50
v6.0