APA150-TQG100 Datasheet, PDF (50/178 Pages) Actel Corporation – ProASICPLUS® Flash Family FPGAs

ProASIC^PLUS Flash Family FPGAs
Table 2-25 • DC Specifications (3.3 V PCI Operation)¹
Commercial/
Industrial²
Military/MIL-STD- 883²
Symbol Parameter
Condition
Min. Max.
Min.
Max.
Units
V_DD
Supply Voltage for Core
2.3
2.7
2.3
2.7
V
V_DDP
Supply Voltage for I/O Ring
3.0
3.6
3.0
3.6
V
V_IH
Input High Voltage
0.5V_DDP V_DDP + 0.5 0.5V_DDP
V_DDP + 0.5
V
V_IL
Input Low Voltage
I_IPU
Input Pull-up Voltage³
I_IL
Input Leakage Current⁴
–0.5 0.3V_DDP
–0.5
0.3V_DDP
V
0.7V_DDP
0.7V_DDP
V
0 < V_IN < V_DDP Std. –10
10
–50
50
μA
V_OH
Output High Voltage
I_OUT = –500 µA
0.9V_DDP
0.9V_DDP
V
V_OL
Output Low Voltage
I_OUT = 1500 µA
0.1V_DDP
0.1V_DDP
V
C_IN
Input Pin Capacitance (except CLK)
10
10
pF
C_CLK
CLK Pin Capacitance
5
12
5
12
pF
Notes:
1. For PCI operation, use GL33, OTB33PH, OB33PH, IOB33PH, IB33, or IB33S macro library cell only.
2. All process conditions. Junction Temperature: –40 to +110°C for Commercial and Industrial devices and –55 to +125°C for Military.
3. This specification is guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a floated
network. Designers with applications sensitive to static power utilization should ensure that the input buffer is conducting minimum
current at this input voltage.
4. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
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