A1020B-PL44C Datasheet, PDF (22/98 Pages) Actel Corporation – Highly Predictable Performance with Automatic Placement and Routing

Decode Module Timing
A
B
C
D
E
Y
F
H
G
A–G, H
Y
50%
V_CC
V_CC
t_PLH
SRAM Timing Characteristics
Write Port
WRAD [5:0]
BLKEN
WEN
WCLK
WD [7:0]
RAM Array
32x8 or 64x4
(256 bits)
t_PHL
Read Port
RDAD [5:0]
LEW
REN
RCLK
RD [7:0]
22