ACE25C400G Datasheet, PDF (7/39 Pages) ACE Technology Co., LTD. – Uniform SECTOR Dual and Quad Serial Flash

ACE25C400G
Uniform SECTOR Dual and Quad Serial Flash
Table1.1 ACE25C400G Protected area size (CMP=1)
Status Register Content
Memory Content
SEC TB BP2 BP1 BP0 Blocks
Addresses
Density
XX0
0
0 0 to 7 000000H-07FFFFH 512KB
0 00
0
1 0 to 6 000000H-06FFFFH 448KB
0 00
1
0 0 to 5 000000H-05FFFFH 384KB
0 00
1
1 0 to 3 000000H-13FFFFH 256KB
0 10
0
1 1 to 7 010000H-07FFFFH 448KB
0 10
1
0 2 to 7 020000H-07FFFFH 384KB
0 10
1
1 4 to 7 040000H-07FFFFH 256KB
0 X1
X
X NONE
NONE
NONE
1 00
0
1 0 to 7 000000H-07EFFFH 508KB
1 00
1
0 0 to 7 000000H-07DFFFH 504KB
1 00
1
1 0 to 7 000000H-07BFFFH 496KB
1 01
0
X 0 to 7 000000H-077FFFH 480KB
1 01
1
0 0 to 7 000000H-077FFFH 480KB
1 10
0
1 0 to 7 001000H-07FFFFH 508KB
1 10
1
0 0 to 7 002000H-07FFFFH 504KB
1 10
1
1 0 to 7 004000H-07FFFFH 496KB
1 11
0
X 0 to 7 008000H-07FFFFH 480KB
1 11
0
X 0 to 7 008000H-07FFFFH 480KB
1 X1
1
1 NONE
NONE
NONE
Portion
NONE
Upper 7/8
Upper 3/4
Upper 1/2
Upper 7/8
Upper 3/4
Upper 1/2
NONE
Upper 127/128
Upper 63/64
Upper 31/32
Upper 15/16
Upper 15/16
Upper 127/128
Upper 63/64
Upper 31/32
Upper 15/16
Upper 15/16
NONE
Status Register
S15
S14
SUS
CMP
S13
S12
S11
LB3
LB2
LB1
S10
Reserved
S9
S8
QE
SRP1
S7
S6
S5
S4
S3
S2
SRP0
SEC
TB
BP2
BP1
BP0
The status and control bits of the Status Register are as follows:
S1
WEL
S0
W1P
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status
register progress. When WIP bit sets to 1, means the device is busy in program/erase/write status
register progress, when WIP bit sets 0, means the device is not in program/erase/write status register
progress.
VER 1.5 7