R11-0869 Datasheet, PDF (13/16 Pages) A-Data Technology – AD3V1600W8G11 DDR3-1600(CL11) 240-Pin VLP R-DIMM 8GB(1024Mx72-bits)

AD3V1600W8G11
DDR3-1600(CL11) 240-Pin VLP R-DIMM
8GB(1024Mx 72-bits)
Timing Parameters:
Symbol
AC Characteristics Parameter
Min
Max
tCK(DLL_OFF) Minimum Clock Cycle Time (DLL off mode)
8
-
tCH(avg) Average high pulse width
0.47
0.53
tCL(avg) Average low pulse width
0.47
0.53
tDQSQ
DQS, DQS# to DQ skew, per group, per access
-
100
tQH
DQ output hold time from DQS, DQS#
0.38
-
Data setup time to DQS, DQS# referenced to Vih(ac) / Vil(ac)
tDS(base)
10
-
levels
Data hold time from DQS, DQS# referenced to Vih(dc) / Vil(dc)
tDH(base)
45
-
levels
tDIPW
DQ and DM Input pulse width for each input
360
-
tRPRE
DQS,DQS# differential READ Preamble
0.9
-
tRPST
DQS, DQS# differential READ Postamble
0.3
-
tQSH
DQS, DQS# differential output high time
0.40
-
tQSL
DQS, DQS# differential output low time
0.40
-
tWPRE
DQS, DQS# differential WRITE Preamble
0.9
-
tWPST
DQS, DQS# differential WRITE Postamble
0.3
-
DQS, DQS# rising edge output access time from rising CK,
tDQSCK
-225
225
CK#
tLZ
DQ, DQS and DQS# low-impedance time
-450
225
tHZ
DQ, DQS and DQS# high-impedance time
-
225
tDQSL
DQS, DQS# differential input low pulse width
0.45
0.55
tDQSH
DQS, DQS# differential input high pulse width
0.45
0.55
tDQSS
DQS, DQS# rising edge to CK, CK# rising edge
-0.27
0.27
tDSS
DQS, DQS# falling edge setup time to CK, CK# rising edge
0.18
-
tDSH
DQS, DQS# falling edge hold time from CK, CK# rising edge
0.18
-
tRTP
Internal READ Command to PRECHARGE Command delay
max(4nCK,7.5ns)
-
Delay from start of internal write transaction to internal read
tWTR
max(4nCK,7.5ns)
-
command
tWR
WRITE recovery time
15
-
tMRD
Mode Register Set command cycle time
4
-
Unit
ns
tCK(avg)
tCK(avg)
ps
tCK(avg)
ps
ps
ps
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
ps
ps
ps
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
-
-
ns
nCK
13