IC41C16100S Datasheet, PDF (19/21 Pages) Integrated Circuit Solution Inc – 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

IC41C16100S
IC41LV16100S
CBR REFRESH CYCLE (Addresses; WE, OE = DON'T CARE)
RAS
tRPC
tCP
UCAS/LCAS
I/O
tRP
tRAS
tCHR
tCSR
tRPC
tRP
tRAS
tCSR
tCHR
Open
HIDDEN REFRESH CYCLE⁽¹⁾ (WE = HIGH; OE = LOW)
RAS
tCRP
UCAS/LCAS
tASR
ADDRESS
Row
I/O
OE
tRAS
tRP
tRCD
tRSH
tAR
tRAD
tRAH tASC
tRAL
tCAH
Open
Column
tAA
tRAC
tCLZ
tCAC
tOE
tORD
tRAS
tCHR
tOFF⁽²⁾
Valid Data
Open
tOD
Undefined
Don’t Care
Notes:
1. A Hidden Refresh may also be performed after a Write Cycle. In this case, WE = LOW and OE = HIGH.
2. tOFF is referenced from rising edge of RAS or CAS, whichever occurs last.
Integrated Circuit Solution Inc.
19
DR010-0D 11/26/2004