ZADCS146 Datasheet, PDF (7/19 Pages) Zentrum Mikroelektronik Dresden AG – 12-Bit, 200ksps, 8-Channel, Serial Output ADC

Datasheet
ZADCS146 / ZADCS147
1.3.3 ZADCS147 Specific Parameters
(VDD = +2.7V to + 5.25V; fSCLK = 3.2MHz (50% duty cycle); 16 clocks/conversion cycle (200 ksps); qOP = qOPmin … qOPmax)
Parameter
Symbol Conditions
Min Typ Max Unit
External Reference at VREF
VREF Input Voltage Range
VREF Input Current
VREF Input Resistance
Shutdown VREF Input Current
Capacitive Bypass at VREF
VREF = 2.5V
1.0
VDD +
50mV
V
180 215 µA
11.5 14
kW
0.1 µA
4.7
µF
Power Requirements
Positive Supply Voltage
Positive Supply Current
Positive Supply Current
VDD
IDD
IDD
VDD = 3.6V ^{Operating Mode}
Full Power-Down
VDD
5.25V
= ^{Operating Mode}
Full Power-Down
2.7
5.25 V
0.85 1.0 _µA
0.5 4.0
1.00 1.3 _µA
0.5 4.0
1.3.4 ZADCS146 / ZADCS147 Digital Pin Parameters
(VDD = +2.7V to + 5.25V; fSCLK = 3.2MHz (50% duty cycle); 16 clocks/conversion cycle (200 ksps); qOP = qOPmin … qOPmax)
Parameter
Symbol Conditions
Min Typ Max Unit
Digital Inputs (DIN, SCLK, CS, nSHDN)
Logic High Level
VIH
VDD = 2.7V
VDD = 5.25V
Logic Low Level
VIL
VDD = 2.7V
VDD = 5.25V
Hysteresis
VHyst
Input Leakage
IIN
VIN = 0V or VDD
Input Low Leakage @ nSHDN
IIN_nSHDN VIN = 0V
Input Capacitance
CIN
Digital Outptus (DOUT, SSTRB)
Output High Current
IOH
VOH= VDD – 0.5V
Output Low Current
Three-State Leakage Current
Three-State Output Capacitance
IOL
ILeak
COUT
VOL= 0.4V
nCS = VDD
nCS = VDD
VDD = 2.7V
VDD = 5.25V
VDD = 2.7V
VDD = 5.25V
1.9
V
3.3
V
0.7 V
1.4 V
0.7
V
± 0.1 ± 1.0 µA
- 5.0 µA
5
pF
3.5
8.5 mA
5.5
10.8 mA
4
11.5 mA
6.4
15.3 mA
± 0.1 ± 1.0 µA
5
pF
Copyright © 2008, ZMD AG, Rev. 1.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
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