Z86L79 Datasheet, PDF (46/58 Pages) Zilog, Inc. – Low-Voltage Microcontroller

Z86L79/80
Low-Voltage Microcontroller
Zilog
FUNCTIONAL DESCRIPTION (Continued)
WDT Time Select (D0, D1). Selects the WDT time period.
It is configured as shown in Table 6.
Table 6. WDT Time Select
Time-Out of
Internal RC
D1
D0
OSC
0
0
5 ms min
0
1
10 ms min
1
0
20 ms min
1
1
80 ms min
Notes:
TpC = XTAL clock cycle.
The default on reset is 10 ms.
Time-Out of
XTAL Clock
256 TpC
512 TpC
1024 TpC
4096 TpC
Note: The WDT can be permanently enabled through a
mask programming option. The option is selected by the
customer at the time of ROM code submittal. In this mode,
WDT is always activated when the device comes out of re-
set. Execution of the WDT instruction serves to refresh the
WDT time-out period. WDT operation in the HALT and
STOP modes is controlled by WDTMR programming. If
this mask option is not selected at the time of ROM code
submission, the WDT must be activated by the user
through the WDT instruction and is always disabled by any
reset to the device.
WDTMR During HALT (D2). This bit determines whether
or not the WDT is active during HALT mode. A 1 indicates
active during HALT. The default is 1.
WDTMR During STOP (D3). This bit determines whether
or not the WDT is active during STOP mode. Since the
XTAL clock is stopped during STOP mode, the on-board
RC has to be selected as the clock source to the
WDT/POR counter. A 1 indicates active during STOP. The
default is 1.
Note: A WDT time-out during STOP mode will have the
same effect like a recovery from any programmed STOP
mode recovery source except the reset delay will occur.
Clock Source for WDT (D4). This bit determines which
oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a 1, the internal RC oscil-
lator is bypassed and the POR and WDT clock source is
driven from the external pin, XTAL1. The default configu-
ration of this bit is 0, which selects the RC oscillator.
3-46
PRELIMINARY
DS97LVO0601