Z90365 Datasheet, PDF (4/8 Pages) Zilog, Inc. – Digital Television Controller

Z90365
Digital Television Controller
PIN DESCRIPTION (Continued)
Table 1. 42-Pin SDIP Pin Identification
Name
Function
Z90365
V_CC
+ 5 Volts
34
GND
0 Volts
13, 30
IRIN
Infrared Remote Capture
36
Input
ADC[4:0]
4-Bit A/D Converter Input 9, 10, 11, 12, 28
PWM10, PWM9
14-Bit Pulse Width
1, 2
Modulator Output
PWM[5:1]
8-Bit Pulse Width Modulator
Output
3, 4, 5, 6, 7
Port0[F:0]
Bit Programmable
Input/Output Ports
21, -, -, -, -, -, 38, 37,
35, -, -, 15, 8, 40, 39,
11
Port1[8:0]
Bit Programmable
Input/Output Ports
16, 12, 20, 19, 18, 17,
42, 41, 14
SCL
I²C Clock I/O
39 or 41
SCD
I²C Data I/O
40 or 42
XTAL1
Crystal Oscillator Input
31
XTAL2
Crystal Oscillator Output
32
LPF
Loop Filter
29
HSYNC
H_SYNC
26
VSYNC
V_SYNC
27
/Reset
Device Reset
33
V[3:1]
OSD Video Output Typically
Drive B, G, and R Outputs
22, 23, 24
Blank
OSD Blank Output
25
HalfBlank
OSD HalfBlank Output
21
RGB Digital
Outputs
R[1:0], G[1:0], and B[1:0] 37, 14, 17, 16, 19, 18
Outputs of the RGB Matrix
SCLK
Internal Processor SCLK
20
Notes:
1. SCL I/O pin is shared with Port 0 or Port 11.
2. SCD I/O pin is shared with Port 02 or Port 12.
3. Half Blank output is a function shared with Port 0F.
4. Digital RGB outputs and the internal SCLK are shared with Port 1 [5:0].
5. Internal processor SCLK is shared with Port 16.
PWM outputs are push/pull
Direction
PWR
PWR
I
AI
O
O
B
B
BOD
BOD
AI
AO
AB
B
B
I
O
O
O
O
O
Reset
–
–
I
I
O
O
I
I
I
O
O
I
I
I
O
O
Zilog
Notes
1
2
3
4
5
6
4
PRELIMINARY
CP97TEL2800