ZCRMZN00100KITG Datasheet, PDF (3/8 Pages) Zilog, Inc. – One development board with no silicon installed

Crimzon^® Development Board Kit
5
4
3
2
D
C4
0.047uF
C
Vbat
R7
10K
R9
47K
B
P1
5
9
4
8
3
7
2
6
1
DB9 FEM/RT
A
HDR#
NAME
SHUNT POSITION
INTERNAL IR AMP
2-4 ON
J20
EXTERNAL IR AMP
1-2 ON
3-4 ON
C3
0.047uF
R3
1
2
2.2M ohm
R4
1
2
10K
C1
C2
R5
1
10K
3300PF
2
3300PF
R6
1
2
6.8K ohm
R8
2
560 ohm
U2A
1
74HCU04
Vbat
R13
110K
10
U2E
11
12
74HCU04
Vbat
U2B
4
3
U2C
6
5
74HCU04
Vbat
8
U2F
13
Vbat
U2D
9
74HCU04
Vbat
R12
10K
74HCU04
74HCU04
Vbat
J5
Vbat
HDR/PIN 1x1
J6
HDR/PIN 1x1
DEFAULT: 2-4 ON
J20
12
34
Vbat
D1
LTR-516AD
P31
Vbat
C5
0.1uF
J1
P00
P01
P02
P03
1
2
3
4
P04
P05
P06
P07
5
6
7
8
PORT 0
J3
P20
P21
P22
P23
P24
P25
P26
P27
1
2
3
4
5
6
7
8
PORT 2
J4
P30
1
P31
2
P32
3
P33
4
P34
5
P35
6
P36
7
P37
8
PORT 3
TEST POINTS
C6
0.1uF
C8
0.1uF
TxD
RxD
Vbat
Vbat
C10
0.1uF
U3
3 _V+
7 _V-
13 _T1OUT
C1+ ²
C1- ⁴
C2+ ⁵
C2- ⁶
T1IN ¹¹
8 _{R1IN R1OUT} 9
15 _VDD
EN ¹
C7
0.1uF
C9
0.1uF
J7
TX
Default: OFF
RX
J8
P07
Default: OFF
P32
14 _GND
SHDN ¹⁶
SP3220EBCA
Vbat
HDR#
J7
J8
NAME
Tx Enable
Rx Enable
DEFAULT SHUNT POSITION
1-2 OFF
1-2 OFF
5
PUG002601-1207
4
3
2
Figure 2. Schematics (1 of 5)
1
J2
Default: On
2
1
HDR/PIN 1x2
Vbat
U1
D
1
2
3
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
8
7
6
5
GND
SCL
SDA
AT24C256
8-pin PDIP socket R1
R2
10K
10K
Vbat
Vbat
Vbat
Vbat
C
R10
330 ohm
R11
10 ohm
P35_OUT
P36_OUT
D2
RED
P35_OUT
R14
2
330 ohm
D3
LTE-5208A
Q1
2N3904
B
GND _GND
Vbat _Vbat
ZiLOG Inc.
6800 Santa Teresa Blvd
San Jose, CA 95119
408-513-1500
Website: www.zilog.com
Title
ZLF645 DEVELOPMENT BOARD
Size Document Number
B
96C1031-001G
Date:
Monday, August 27, 2007
Sheet
1
1
A
Rev
B
of 5
Page 3 of 8