Z86127 Datasheet, PDF (2/8 Pages) Zilog, Inc. – LOW-COST DIGITAL TELEVISION CONTROLLER (LDTC)

GENERAL DESCRIPTION (Continued)
XTAL1
XTAL2
/RESET
P30
P31
P34
P35
P36
RESET
Oscillator
WDT
Counter
Timer
Counter
Timer
Port 3/
Interrupt
P50( P00 )
P51( P01 )
P52( P02 )
P53( P03 )
P54( P04 )
P55( P05 )
P56( P06 )
P57( P07 )
P60( /AS )
P61( /DS )
P62( R//W )
P63( SCLK )
P64( P66 )*
P65( P67 )*
AFCIN
Port 5
(Port 0)
Port 6
(Control)
8 KByte
Program ROM
Z8 CPU
Core
256 Byte
Register File
Port 0
Port 1
A8:15
AD0:7
160 Byte
Character RAM
4 KByte
Character ROM
Functional Block Diagram
Port 2
PWM 1
14 -bit
PWM 6
to
PWM 8
6-bit
PWM 9
to
PWM 13
8-bit
On Screen
Display
P27
P26
P25
P24
P23
P22
P21
P20
PWM 1
PWM 6
PWM 7
PWM 8
PWM 9
PWM 10
PWM 11
PWM 12
PWM 13
OSCIN
OSCOUT
HSYNC
VSYNC
VRED
VGREEN
VBLUE
VBLANK
2